A vacuum cell including a vacuum chamber, a first bond, and a second bond is described. The first bond affixes a first portion of the vacuum cell to a second portion of the vacuum cell. The first bond has a first bonding temperature and a first debonding temperature greater than the first bonding temperature. The second bond affixes a third portion of the vacuum cell to a fourth portion of the vacuum cell. The second bond has a second bonding temperature and a second debonding temperature. The second bonding temperature is less than the first debonding temperature.

A semiconductor device has an electrical component and heat sink disposed over the electrical component. A portion of the heat sink extends at least partially down a side surface of the electrical component to prevent lateral movement of the heat sink with respect to the semiconductor die. Alternatively, a portion of the heat sink extends at least partially below a surface of the electrical component. The heat sink can have an angled side, extension, or indentation to stabilize the heat sink on the electrical component to prevent rotation or otherwise shifting position that would impart movement in the lateral direction and possibly contact adjacent components or create defects on the PCB. The portion of the heat sink extending at least partially down does so on at least two side surfaces of the electrical component. The electrical component can be a flipchip semiconductor die.

A semiconductor device has an electrical component and heat sink disposed over the electrical component. A portion of the heat sink extends at least partially down a side surface of the electrical component to prevent lateral movement of the heat sink with respect to the semiconductor die. Alternatively, a portion of the heat sink extends at least partially below a surface of the electrical component. The heat sink can have an angled side, extension, or indentation to stabilize the heat sink on the electrical component to prevent rotation or otherwise shifting position that would impart movement in the lateral direction and possibly contact adjacent components or create defects on the PCB. The portion of the heat sink extending at least partially down does so on at least two side surfaces of the electrical component. The electrical component can be a flipchip semiconductor die.

A semiconductor device has a substrate and first and second electrical component disposed over the substrate. A first metal bar is disposed over the substrate between the first electrical component and second electrical component. The first metal bar is formed by disposing a mask over a carrier. An opening is formed in the mask and a metal layer is sputtered over the mask. The mask is removed to leave the metal layer within the opening as the first metal bar. The first metal bar can be stored in a tape-and-reel.

A semiconductor device has a substrate and first and second electrical component disposed over the substrate. A first metal bar is disposed over the substrate between the first electrical component and second electrical component. The first metal bar is formed by disposing a mask over a carrier. An opening is formed in the mask and a metal layer is sputtered over the mask. The mask is removed to leave the metal layer within the opening as the first metal bar. The first metal bar can be stored in a tape-and-reel.

Semiconductor devices including vertically-stacked combination memory devices and associated systems and methods are disclosed herein. The vertically-stacked combination memory devices include at least one volatile memory die and at least one non-volatile memory die stacked on top of each other. The corresponding stack may be attached to a controller die that is configured to provide interface for the attached volatile and non-volatile memory dies.

Semiconductor devices including vertically-stacked combination memory devices and associated systems and methods are disclosed herein. The vertically-stacked combination memory devices include at least one volatile memory die and at least one non-volatile memory die stacked on top of each other. The corresponding stack may be attached to a controller die that is configured to provide interface for the attached volatile and non-volatile memory dies.

A semiconductor device, including a semiconductor module, a positioning member and a printed board. The semiconductor module includes a case that stores a semiconductor chip, a plurality of external terminals electrically connected to the semiconductor chip and extending upward from a front surface of the case, and a reference pin extending upward from the front surface of the case. The positioning member has a reference hole and a plurality of supporting holes penetrating therethrough. The printed board including a plurality of terminal holes that respectively correspond to the plurality of external terminals. The printed board is disposed on the front surface of the case via the positioning member. The plurality of external terminals of the semiconductor module are respectively attached to the plurality of terminal holes.

A semiconductor package includes a substrate, a semiconductor die, a ring structure and a lid. The semiconductor die is disposed on the substrate. The ring structure is disposed on the substrate and surrounds the semiconductor die, where a first side of the semiconductor die is distant from an inner sidewall of the ring structure by a first gap, and a second side of the semiconductor die is distant from the inner sidewall of the ring structure by a second gap. The first side is opposite to the second side, and the first gap is less than the second gap. The lid is disposed on the ring structure and has a recess formed therein, and the recess overlaps with the first gap in a stacking direction of the ring structure and the lid.

An approach for transferring solder to a laminate structure in IC (integrated circuit) packaging is disclosed. The approach comprises of a device and method of applying the device. The device comprises of a substrate, a laser ablation layer and solder layer. The device is made by depositing a laser ablation layer onto a glass/silicon substrate and plenty of solder powder/solder pillar is further deposited onto the laser ablation layer. The laminate packaging substrate includes pads with a pad surface finishing layer made from gold. The solder layer of the device is bonded to the laminate packaging substrate. Once bonded, using laser to irradiate the laser ablation layer, the substrate is removed from the laminate.