A surface treatment apparatus and a surface treatment system having the same are disclosed. The surface treatment apparatus includes a process chamber in which the surface treatment process is conducted, a plasma generator for generating process radicals as a plasma state for the surface treatment process, the plasma generator being positioned outside of the process chamber and connected to the process chamber by a supply duct, a heat exchanger arranged on the supply duct and cooling down temperature of the process radicals passing through the supply duct and a flow controller controlling the process radicals to flow out of the process chamber. The flow controller is connected to a discharge duct through which the process radicals are discharged outside the process chamber. The plasma surface treatment process is conducted to the package structure having minute mounting gap without the damages to the IC chip and the board.

A substrate processing device according to the present embodiment includes a processing tank configured to be capable of accumulating a liquid. A conveyer can array a plurality of semiconductor substrates in such a manner that front surfaces of the semiconductor substrates face a substantially horizontal direction, and transport the semiconductor substrates into the processing tank. A plurality of liquid suppliers can supply the liquid toward an inside of the processing tank from a lower portion of the processing tank. A plurality of current plates are arranged on at least either one end side or the other end side of an array of the semiconductor substrates. The current plates are provided in a first gap region above the semiconductor substrates in gaps between the conveyer and a sidewall of the processing tank on both sides of the conveyer as viewed from an array direction of the semiconductor substrates.

A method includes aligning and positioning a carrier in a predetermined orientation and location within a first front opening pod (FOUP) of a cluster tool, transferring the carrier to a charging station of the cluster tool, transferring a substrate from a second front opening pod (FOUP) of the cluster tool to the charging station and chucking the substrate onto the carrier, transferring the carrier having the substrate thereon from the charging station to a factory interface of the cluster tool, aligning the carrier having the substrate thereon in the factory interface of the cluster tool such that during substrate processing within a processing platform of the cluster tool the carrier is properly oriented and positioned relative to components of the processing platform, where the processing platform comprises one or more processing chambers, transferring the aligned carrier having the substrate thereon from the factory interface to the processing platform of the cluster tool for substrate processing, and transferring the aligned carrier having the processed substrate thereon from the processing platform to the factory interface.

The present invention relates to a wafer cleaning device which can prevent a cleaning solution from leaking and enables prompt treatment. The present invention provides a wafer cleaning device comprising: a cleaning bath which receives a cleaning solution and from which the cleaning solution overflows according to the dipping of wafers; a plurality of lift parts arranged at the outside of the cleaning bath and dipping the cassette into the cleaning solution in the cleaning bath; an external water tank having the cleaning bath and the lift parts received therein and including a drain hole through which the cleaning solution is drained; and a tray which can be detachably attached to the inner bottom surface of the external water tank and collects the cleaning solution to guide same to the drain hole.

A chip carrier device includes a frame, a chip support and a limiter. The chip support is disposed on the frame, and includes a supporting film for chips to be adhered thereto. A peripheral portion of the supporting film is attached to a surrounding frame part of the frame. A crossing portion of the supporting film passes through a center of the supporting film, and interconnects two opposite points of the peripheral portion. The supporting film is formed with through holes. The limiter includes a limiting part that interconnects two opposite points of the surrounding frame part, that is positioned corresponding to the crossing portion, and that is positioned on one side of the supporting film where the chips are to be arranged.

A method includes aligning and positioning a carrier in a predetermined orientation and location within a first front opening pod (FOUP) of a cluster tool, transferring the carrier to a charging station of the cluster tool, transferring a substrate from a second front opening pod (FOUP) of the cluster tool to the charging station and chucking the substrate onto the carrier, transferring the carrier having the substrate thereon from the charging station to a factory interface of the cluster tool, aligning the carrier having the substrate thereon in the factory interface of the cluster tool such that during substrate processing within a processing platform of the cluster tool the carrier is properly oriented and positioned relative to components of the processing platform, where the processing platform comprises one or more processing chambers, transferring the aligned carrier having the substrate thereon from the factory interface to the processing platform of the cluster tool for substrate processing, and transferring the aligned carrier having the processed substrate thereon from the processing platform to the factory interface.

Provided is a wafer container including a frame having a first sidewall and a second sidewall extending along a YZ plane; a plurality of first support structures disposed on the first sidewall and arranged along a Z direction; and a plurality of second support structures disposed on the second sidewall and arranged along the Z direction. One of the plurality of first support structures is horizontally aligned with a corresponding second support structure to constitute a wafer holder. The wafer holder includes a plurality of island structures to hold a wafer in a XY plane, and the plurality of island structures are separated to each other along a X direction. A method for holding at least one wafer is also provided.

In accordance with an exemplary embodiment, a substrate processing apparatus includes: a tube assembly having an inner space in which substrates are processed and assembled by laminating a plurality of laminates, a substrate holder configured to support the plurality of substrates in a multistage manner in the inner space of the tube assembly, a gas supply unit installed on one side of the tube assembly to supply a process gas to each of the plurality of substrates in the inner space; and an exhaust unit connected to the tube assembly to exhaust the process gas supplied into the inner space, the substrate processing apparatus that induces a laminar flow to supply a uniform amount of process gas to a top surface of the substrate.

Carrier, container or other system that provides a separation and protection for substrates, wafers, etc. for before, during or after processing or storage through the use of a membrane integral to the carrier or container respectively. This includes for use with Tec-Cell systems with high and low density configurations as well as other standardized systems, such as FOUPs. Includes protection for contamination brakeage chafing, through isolation and containment. Additional features are included such as the membrane providing guides or otherwise increasing efficiency or presence of airflow, such as laminar airflow over each substrate, wafer, etc. being held.

Provided is a wafer container including a frame and at least a pair of the stents. The frame has opposite sidewalls. The at least a pair of the stents is respectively disposed on the sidewalls of the frame, wherein the at least a pair of the stents is configured to provide at least three supporting points to support at least one wafer. A method for holding at least one wafer is also provided.