A tray of an automated handling system for transporting semiconductor devices includes: a receiving region that is configured to receive a boat, the boat carrying one or more semiconductor devices thereon; and a clamping mechanism that selectively clamps the boat, residing in the receiving region, to the tray. Suitably, the clamping mechanism is automatically disengaged when the tray is positioned in a designated location and automatically engaged when the tray is not positioned in the designated location, such that, when engaged, the clamping mechanism holds the boat, residing in the boat receiving region, securely within the tray, and when disengaged, the clamping mechanism releases the boat residing in the boat receiving region.

The present invention relates to an electronic component test handler comprising: a hand configured to pick up and transfer a plurality of devices; and a scanner configured to scan a region of a movement path of a device picked up by the hand at a predetermined angle. The electronic component test handler having a flying scan function according to the present invention is capable of scanning during a transfer process without a change in position after picking up a device, and thus, operations and time required for the scanning may be reduced, thereby improving efficiency.

The current disclosure describes carrier tape systems, which include a carrier tape including a plurality of pockets. Each pocket contains a semiconductor device adhered to a bottom surface of the pocket by an adhesive. In some embodiments, the adhesive is a reversible adhesive. Use of the adhesive reduces the likelihood the semiconductor device will be damaged due to movement of the semiconductor device in the pocket during shipment of the carrier tape. Methods of forming a semiconductor device carrier systems and methods of supplying semiconductor devices are also described.

The present invention provides a chip carrier that selectively carries a chip under test or a standard chip. The chip carrier comprises a body and a load board. The body defines a test area located on an upper surface of the body, and a first chip position is defined in the test area. The load board is detachably located in the test area, and a second chip position is defined in the load board. A standard chip is disposed within the second chip position. When the load board is located in the test area, the load board covers the first chip position and the chip under test is not disposed within the first chip position. When the chip under test is disposed within the first chip position, the load board is not located in the test area.

In certain embodiments, a workstation includes: a cleaning station configured to clean a die vessel, wherein the die vessel is configured to secure a semiconductor die; an inspection station configured to inspect the die vessel after cleaning to determine whether the die vessel is identified as passing inspection; and a conveyor configured to move the die vessel between the cleaning station and the inspection station.

Introduced here are carrier tape assemblies that can improve efficiency and reduce costs when utilized in the handling, transport, or storage of semiconductor components. A carrier tape assembly can include an adhesive film affixed to an elongated and/or extruded carrier tape. For example, the adhesive film may be integrally laminated onto the top surface of the elongate carrier tape as a single continuous (i.e., unbroken) sheet. The adhesive film may substantially conform to the top surface of the elongate carrier tape, including any punched cavities for holding semiconductor components. Proper securement of the semiconductor components to the carrier tape assembly depends on the adhesive property of the constituent material(s) of the adhesive film.

A chamber module and a test handler including the same are disclosed. The chamber module includes a soak chamber providing a temperature adjusting space for adjusting a temperature of semiconductor devices, an elevating member disposed in the soak chamber and for elevating a tray in which the semiconductor devices are accommodated, a guide member extending in a vertical direction in the soak chamber and for guiding movement of the elevating member, and a temperature adjusting part for adjusting a temperature of the guide member.

A tray includes a body for placement of a component (e.g. electronic component) and a taker disposed on a bottom surface of the body. The taker is used to take a spacer and includes a first taking element and a second taking element. The first taking element includes a first connection portion and a first confinement portion, and the second taking element includes a second connection portion and a second confinement portion. An accommodation space is provided between the first and second connection portions and a passageway is provided between the first and second confinement portions. While the spacer is moved through the passageway and into the accommodation space, it is confined in the accommodation space by the first and second confinement portions such that the taker can take away the spacer to show another tray located under the spacer as the tray is removed.

A substrate structure includes at least one detachable first substrate unit and a substrate body. The detachable first substrate unit includes a plurality of corners and a plurality of first engagement portions. Each of the first engagement portions is disposed at each of the corners of the detachable first substrate unit. The substrate body includes a plurality of second substrate units, at least one opening and a plurality of second engagement portions. The opening is substantially defined by a plurality of sidewalls of the second substrate units, and includes a plurality of corners. Each of the second engagement portions is disposed at each of the corners of the opening. The detachable first substrate unit is disposed in the opening, and the second engagement portions are engaged with the first engagement portions.

A device for picking and placing semiconductor chips includes a liquid having a first surface and a second surface and a layer of semiconductor chips disposed over the first surface. Characteristically, the first surface is a liquid-air interface. The device also includes a focused ultrasonic transducer positioned to focus acoustic wave on the layer of semiconductor chips such that a droplet including at least one semiconductor chip is ejected through the liquid-air per each actuation of the focused ultrasonic transducer through droplet ejection. The focused ultrasonic transducer includes a piezoelectric substrate having a top face and a bottom face, a Fresnel acoustic lens including a plurality of annular rings of air cavities disposed on the top face, and a first patterned circular electrode disposed over the top face and a second patterned circular electrode disposed over the bottom face. The first patterned circular electrode overlaps the second patterned circular electrode.