An electronic device (e.g., a diode) is provided that includes a substrate and a patterned layer of superconducting material disposed over the substrate. The patterned layer forms a first electrode, a second electrode, and a loop coupling the first electrode with the second electrode by a first channel and a second channel. The first channel and the second channel have different minimum widths. For a range of current magnitudes, when a magnetic field is applied to the patterned layer of superconducting material, the conductance from the first electrode to the second electrode is greater than the conductance from the second electrode to the first electrode.

An embodiment device includes: a first dielectric layer; a first photonic die and a second photonic die disposed adjacent a first side of the first dielectric layer; a waveguide optically coupling the first photonic die to the second photonic die, the waveguide being disposed between the first dielectric layer and the first photonic die, and between the first dielectric layer and the second photonic die; a first integrated circuit die and a second integrated circuit die disposed adjacent the first side of the first dielectric layer; conductive features extending through the first dielectric layer and along a second side of the first dielectric layer, the conductive features electrically coupling the first photonic die to the first integrated circuit die, the conductive features electrically coupling the second photonic die to the second integrated circuit die; and a second dielectric layer disposed adjacent the second side of the first dielectric layer.

A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes a semiconductor die, an encapsulant and a redistribution structure. The encapsulant laterally encapsulates the semiconductor die. The redistribution structure is disposed on the encapsulant and electrically connected with the semiconductor die, wherein the redistribution structure comprises a first conductive via, a first conductive wiring layer and a second conductive via stacked along a stacking direction, the first conductive via has a first terminal surface contacting the first conductive wiring layer, the second conductive via has a second terminal surface contacting the first conductive wiring layer, an area of a first cross section of the first conductive via is greater than an area of the first terminal surface of the first conductive via, and an area of a second cross section of the second conductive via is greater than an area of the second terminal surface of the second conductive via.

A template for growing Group III-nitride semiconductor layers, a Group III-nitride semiconductor light emitting device and methods of manufacturing the same are provided. The template for growing Group III-nitride semiconductor layers includes a growth substrate having a first plane, a second plane opposite to the first plane and a groove extending inwards the growth substrate from the first plane, an insert for heat dissipation placed and secured in the groove, and a nucleation layer formed on a partially removed portion of the first plane.

A semiconductor package includes a package substrate, an interposer provided on the package substrate, a plurality of semiconductor devices on the interposer and spaced apart from each other, and electrically connected to each other through the interposer, at least one dummy member on the interposer to cover at least one corner portion of the interposer and arranged spaced apart from a first semiconductor device among the plurality of semiconductor devices, and a sealing member contacting the interposer and filling a space between the first semiconductor device and the at least one dummy member so as to cover a first side surface of the first semiconductor device, a first side surface of the at least one dummy member, and an upper surface of the dummy member. A second side surface, opposite to the first side surface, of the at least one dummy member is uncovered by the sealing member.

Provide are a transfer system and a transfer method. The transfer system is configured to transfer chips and includes a temporary substrate and a transfer device. The temporary substrate has a first surface and a second surface opposite to each other. There is a first angle between the second surface and the first surface. The transfer device has a transfer substrate and a plurality of transfer heads provided on the transfer substrate. The transfer substrate has a third surface and a fourth surface opposite to each other, and there is a second angle between the fourth surface and the third surface. The plurality of transfer heads are located at intervals on the fourth surface, and a side surface of the above-mentioned transfer head that faces away from the transfer substrate is parallel to the fourth surface.

In an embodiment, a method includes forming a conductive feature adjacent to a substrate; treating the conductive feature with a protective material, the protective material comprising an inorganic core with an organic coating around the inorganic core, the treating the conductive feature comprising forming a protective layer over the conductive feature; and forming an encapsulant around the conductive feature and the protective layer. In another embodiment, the method further includes, before forming the encapsulant, rinsing the protective layer with water. In another embodiment, the protective layer is selectively formed over the conductive feature.

A ceramic substrate made of a dielectric material including silicon carbide particles, which is used as a forming material, in which the number of the silicon carbide particles per unit area on the surface of the substrate is smaller than the number of the silicon carbide particles per unit area in a cross section of the substrate.

The invention discloses a glass carrier having a protection structure, comprising a glass body and a protection layer. The glass body has a top surface, a bottom surface, and a lateral surface. The protection layer covers the lateral surface of the glass body. The protection layer is a hard material with a stiffness coefficient higher than a stiffness coefficient of the glass body. The invention further discloses a manufacturing method of a glass carrier having a protection structure, comprising the following steps: covering the protection layer around the lateral surface of the glass body, wherein the protection layer is the hard material with the stiffness coefficient higher than the stiffness coefficient of the glass body.

An electronic package is provided. The electronic package includes an amplifier component, a control component, and a first circuit layer. The control component is disposed above the amplifier component. The first circuit layer is disposed between the amplifier component and the control component. The control component is configured to transmit a first signal to the amplifier component and to output a second signal amplified by the amplifier component.