H01L21/707

Radio frequency (RF) inductive signal coupler and method therefor
10438906 · 2019-10-08 · ·

A reference circuit includes an integrated circuit (IC) formed on a semiconductor substrate including a first spiral inductor and a second spiral inductor. The first spiral inductor is formed from a first metal layer over the substrate. The second spiral inductor is formed from a second metal layer. The second spiral inductor is offset from the first spiral inductor and includes a first portion overlapping the first spiral inductor. A first capacitor includes a first terminal coupled to receive a radio frequency (RF) signal and a second terminal coupled to a first terminal of the first spiral inductor, and second capacitor includes a first terminal coupled to a second terminal of the first spiral inductor.

Thin film transistor comprising light shielding layers, array substrate and manufacturing processes of them

A thin film transistor and a manufacturing method thereof, and an array substrate are disclosed. The thin film transistor includes a gate electrode, an insulating layer, an active layer and a source/drain electrode layer, and further includes a light shielding layer, and the light shielding layer is configured to block light from entering the active layer via the insulating layer, and the light shielding layer and the gate electrode are arranged in a same layer and electrically unconnected with each other. The thin film transistor can reduce the light irradiated to the active layer and thus reduce the adverse impact thus incurred.

PROGRAMMABLE CHARGE STORAGE ARRAYS AND ASSOCIATED MANUFACTURING DEVICES AND SYSTEMS
20190252017 · 2019-08-15 · ·

A charge storage cell includes a substrate having a back side conductive layer or conductive element, a top side metal pad coupled to the substrate, and an insulating layer formed on the metal pad. The metal pad will support an electric charge injected through the insulating layer by a charged particle beam. A regular array of charge storage cells provides a charge storage array.

Method of manufacturing thin film transistor, dehydrogenating apparatus for performing the same, and organic light emitting display device including thin film transistor manufactured by the same
10325928 · 2019-06-18 · ·

Provided are a method of manufacturing a thin film transistor, a dehydrogenating apparatus for performing the method, and an organic light emitting display device including a thin film transistor manufactured by the same. A method of manufacturing a thin film transistor includes reducing a content of oxygen in a chamber for performing a dehydrogenation process of an amorphous silicon layer from a first value to a second value, inserting a substrate on which the amorphous silicon layer is formed into the chamber, heating the inside of the chamber to perform the dehydrogenation process on the amorphous silicon layer, and forming a polysilicon layer by crystallizing the amorphous silicon layer using a laser.

Programmable charge storage arrays and associated manufacturing devices and systems
10312319 · 2019-06-04 · ·

A charge storage cell includes a conductive substrate, a substantially vertical post comprising a first insulating material coupled to the conductive substrate and a conductive cap coupled to the vertical post. The charge storage cell also includes a top side planarizing layer comprising a second insulating material and covering the conductive cap. The conductive cap will support an electric charge injected through the top side planarizing layer by a modulated charged particle beam.

Integrated circuit including a capacitive structure of the metal-insulator-metal type and corresponding manufacturing method

An integrated circuit includes a semiconductor substrate, a conductive layer above a front face of the substrate, a first metal track in a first metal level, and a pre-metal dielectric region located between the conductive layer and the first metal level. A metal-insulator-metal-type capacitive structure is located in a trench within the pre-metal dielectric region. The capacitive structure includes a first metal layer electrically connected with the conductive layer, a second metal layer electrically connected with the first metal track, and a dielectric layer between the first metal layer and the second metal layer.

SEMICONDUCTOR STRUCTURE, ELECTRONIC DEVICE, AND METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE

A semiconductor structure includes a first metal-dielectric-metal layer, a first dielectric layer, a first conductive layer, a second conductive layer, and a second dielectric layer. The first metal-dielectric-metal layer includes a plurality of first fingers, a plurality of second fingers, and a first dielectric material. The first fingers are electrically connected to a first voltage. The second fingers are electrically connected to a second voltage different from the first voltage, and the first fingers and the second fingers are arranged in parallel and staggeredly. The first dielectric material is between the first fingers and the second fingers. The first dielectric layer is over the first metal-dielectric-metal layer. The first conductive layer is over the first dielectric layer. The second conductive layer is over the first conductive layer. The second dielectric layer is between the first conductive layer and the second conductive layer.

Method for preparing ceramic package substrate with copper-plated dam

A method for preparing a ceramic package substrate with a copper-plated dam involves making a circuit layer on a ceramic base by performing thin film metallization, dry film application, exposure, development, copper plating, and evening, and then forming copper-plated dams that circle individual circuits by repeatedly applying dry film application, exposure, development, and electroplating for thickening, so as to obtain the ceramic package substrate with the copper-plated dam. Circuits made using the method feature for high dimensional precision, high line resolution, and high surface evenness.

Integrated Circuit and Manufacturing and Method Thereof

A novel integrated circuit and method thereof are provided. The integrated circuit includes a plurality of first interconnect pads, a plurality of second interconnect pads, a first inter-level dielectric layer, a thin film resistor, and at least two end-caps. The end-caps, which are connectors for the thin film resistor, are positioned at the same level with the plurality of second interconnect pads. Therefore, an electrical connection between the end-caps and the plurality of second interconnect pads can be formed by directly connection of them. An integrated circuit with a thin film resistor can be made in a cost benefit way accordingly, so as to overcome disadvantages mentioned above.

Film deposition apparatus and method for cleaning film deposition apparatus
10269538 · 2019-04-23 · ·

An example film forming device is provided with: a chamber for forming a film on a substrate; a supply tube for supplying a cleaning gas to the chamber; and a plasma generating unit, which is provided to the supply tube, and which generates plasma from the cleaning gas. The film forming device is characterized by being provided with: a temperature control unit that controls the temperature of the supply tube to temperature equal to or higher than a predetermined temperature; and a supply unit which supplies, each time when a previously set time equal to or shorter than 36 hours elapses, the chamber with the plasma thus generated by the plasma generating unit.