Patent classifications
H01L23/142
SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FABRICATING THE SAME
A semiconductor device structure is provided. The semiconductor device structure includes a first transparent substrate, a conductive layer, an insulating protective layer, a second transparent substrate, a device substrate, and a bonding layer. The first transparent substrate has a first surface and an opposite second surface. The conductive layer is disposed on the second surface of the first transparent substrate. The insulating protective layer covers the conductive layer and the first transparent substrate. The second transparent substrate is disposed above the first transparent substrate, and has a first surface facing the first transparent substrate and an opposite second surface. The device substrate is disposed on the second surface of the second transparent substrate. The bonding layer is bonded to the insulating protective layer and the first surface of the second transparent substrate.
Semiconductor device and manufacturing method thereof
A semiconductor device includes channel region, first and second two-dimensional metallic contacts, a gate structure, and first and second metal contacts. The channel region includes a two-dimensional semiconductor material. The first two-dimensional metallic contact is disposed at a side of the channel region and includes a two-dimensional metallic material. The second two-dimensional metallic contact is disposed at an opposite side of the channel region and includes the two-dimensional metallic material. The gate structure is disposed on the channel region in between the first and second two-dimensional metallic contacts. The first metal contact is disposed at an opposite side of the first two-dimensional metallic contact with respect to the channel region. The second metal contact is disposed at an opposite side of the second two-dimensional metallic contact with respect to the channel region. The first and second two-dimensional metallic contacts contact sideways the channel region to form lateral semiconductor-metallic junctions.
Substrate structures and methods of manufacture
Implementations of semiconductor packages may include a metallic baseplate, a first insulative layer coupled to the metallic baseplate, a first plurality of metallic traces, each metallic trace of the first plurality of metallic traces coupled to the electrically insulative, one or more semiconductor devices coupled to each one of the first plurality of metallic traces, a second plurality of metallic traces coupled to the one or more semiconductor devices, and a second insulative layer coupled to the metallic traces of the second plurality of metallic traces.
CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME
The present application provides a circuit board and a manufacturing method therefor. The circuit board includes: a core board, at least one chip, a first circuit layer, and a first insulating layer. A groove body is formed on the core board. The chip is provided in the groove body. The chip is provided with a first lead-out terminal. The first circuit layer is provided on at least one side of the core board. The first insulating layer is provided between the core board and the first circuit layer. The first lead-out terminal passes through the first insulating layer and is connected to the first circuit layer, so that the chip is electrically connected to the first circuit layer. Thus, the wiring between the chip and the circuit is more flexible.
PACKAGE SUBSTRATE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
Provided a package substrate including an insulation substrate, a conductive layer provided in the insulation substrate, upper pads provided on an upper surface of the insulation substrate and electrically connected to the conductive layer, lower pads provided on a lower surface of the insulation substrate and electrically connected to the conductive layer, and at least one trench provided at a portion of the insulation substrate adjacent to at least one of the upper pads and configured to block stress, which is generated by an expansion of the insulation substrate, from spreading to the at least one of the upper pads.
Embedded circuit board and method of manufacturing same
The invention, which relates to the technical field of inductance embedding, specifically discloses an embedded circuit board. The embedded circuit board includes: at least layer of sub-body, where preset positions of the sub-bodies are provided with through slots; and an inductance element embedded within the slots and configured to be spaced apart from sidewalls of the slots. In the above manner, it is possible to make the embedded circuit board of the present application structurally compact, highly integrated, widely applicable, and safe and reliable.
Substrate structures and methods of manufacture
A power electronic substrate includes a metallic baseplate having a first and second surface opposing each other. An electrically insulative layer also has first and second surfaces opposing each other, its first surface coupled to the second surface of the metallic baseplate. A plurality of metallic traces each include first and second surfaces opposing each other, their first surfaces coupled to the second surface of the electrically insulative layer. At least one of the metallic traces has a thickness measured along a direction perpendicular to the second surface of the metallic baseplate that is greater than a thickness of another one of the metallic traces also measured along a direction perpendicular to the second surface of the metallic baseplate. In implementations the electrically insulative layer is an epoxy or a ceramic material. In implementations the metallic traces are copper and are plated with a nickel layer at their second surfaces.
INSULATING COMPONENT, SEMICONDUCTOR PACKAGE, AND SEMICONDUCTOR APPARATUS
An insulating component includes an insulating substrate, a metal layer, a bond, and a lead terminal. The plate-like insulating substrate has a groove continuous from its upper to side surfaces. The metal layer includes a first metal layer on the upper surface of the insulating substrate and a second metal layer on an inner surface of the groove continuous with the first metal layer. The bond is on an upper surface of the metal layer. The lead terminal is on an upper surface of the first metal layer with the bond in between, and overlaps the grooves. The bond includes a first bond fixing the lead terminal to the first metal layer and a second bond on an upper surface of the second metal layer continuous with the first bond. The groove includes an inner wall having a ridge. The second bond is between the ridge and the lead terminal.
Wiring board
A wiring board has a metal-made base having a front surface and a back surface, an insulating frame body bonded to the front surface of the base through a bonding layer made of bonding material, a seating provided in an area that is located at an inner side with respect to the frame body on the front surface of the base, a mounting area where a component is supposed to be mounted on the front surface of the base, and a groove formed on the front surface of the base. The groove is arranged in at least an area between the mounting area and the seating on the front surface in plan view, and extends in a direction crossing an opposing direction of the mounting area and the seating.
Wiring substrate and electronic device
A wiring substrate includes: an insulating substrate comprising a principal face; a wiring line located on the principal face; and a protruding portion on a side of the wiring line, the protruding portion being smaller in thickness than the wiring line and protrudes from the side along the principal face.