This disclosure relates to a multilayer structure containing: a substrate; a coupling layer deposited on the substrate; and a dielectric layer deposited on the coupling layer, wherein shear strength is increased by a factor of at least about 2 in the presence of the coupling layer compared to a multilayer in the absence of the coupling layer.

Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate having a first surface and an opposing second surface, and a die secured to the package substrate, wherein the die has a first surface and an opposing second surface, the die has first conductive contacts at the first surface and second conductive contacts at the second surface, and the first conductive contacts are coupled to conductive pathways in the package substrate by first non-solder interconnects.

The present disclosure relates to a thermosetting resin composition for a semiconductor package including a modified phenylene ether oligomer or a modified poly(phenylene ether) having ethylenically unsaturated groups at both ends thereof; a thermosetting resin; a predetermined elastic (co)polymer; and an inorganic filler, and a prepreg and a metal clad laminate including the same.

A package includes a redistribution structure, a die package on a first side of the redistribution structure including a first die connected to a second die by metal-to-metal bonding and dielectric-to-dielectric bonding, a dielectric material over the first die and the second die and surrounding the first die, and a first through via extending through the dielectric material and connected to the first die and a first via of the redistribution structure, a semiconductor device on the first side of the redistribution structure includes a conductive connector, wherein a second via of the redistribution structure contacts the conductive connector of the semiconductor device, a first molding material on the redistribution structure and surrounding the die package and the semiconductor device, and a package through via extending through the first molding material to contact a third via of the redistribution structure.

A multi-chip device includes a first material within a substrate. The first material has a first coefficient of thermal expansion different than a second coefficient of thermal expansion of the substrate. A first chip overlies a first portion of the first material and a first portion of the substrate. A second chip overlies a second portion of the first material and a second portion of the substrate. The first material is between the first portion of the substrate and the second portion of the substrate.

A printed circuit board with an embedded bridge includes: a first connection structure including a first insulating film; a bridge disposed on the first connection structure and having one surface, in contact with the first insulating film; and a second connection structure disposed on the first connection structure, and including a second insulating film. The second insulating film covers at least a portion of the other surface of the bridge.

An organic interposer includes: a first organic insulating layer including a groove; a first metal wire located in the groove; a barrier metal material covering the first metal wire; and a second metal wire located above the first metal wire, wherein the barrier metal material includes: a first barrier metal film interposed between the first metal wire and an inner surface of the groove; and a second barrier metal film located on the first metal wire, and wherein the second metal wire is in contact with both of the first barrier metal film and the second barrier metal film.

A composition comprising a monomer of the general formula (M1) wherein M is a metal or semimetal of main group 3 or 4 of the periodic table; X.sup.M1, X.sup.M2 are each O; R.sup.M1, R.sup.M2 are the same or different and are each an —CR.sup.aR.sup.b—Ar—O—R.sup.c; Ar is a C.sub.6 to C.sub.30 carbocyclic ring system; R.sup.a, R.sup.b are the same or different and are each H or C.sub.1 to C.sub.6 alkyl; R.sup.c is C.sub.1-C.sub.22-alkyl, benzyl or phenyl; q according to the valency and charge of M is 0 or 1; X.sup.M3, X.sup.M4 are the same or different and are each O, C.sub.6 to C.sub.10 aryl, or —CH.sub.2—; R.sup.M3, R.sup.M4 are the same or different and are each R.sup.M1, H, C.sub.1-C.sub.22 alkyl, or a polymer selected from a polyalkylene, a polysiloxane, or a polyether.

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A method of forming a semiconductor structure includes bonding a first die and a second die to a first side of a first interposer and to a first side of a second interposer, respectively, where the first interposer is laterally adjacent to the second interposer; encapsulating the first interposer and the second interposer with a first molding material; forming a first recess in a second side of the first interposer opposing the first side of the first interposer; forming a second recess in a second side of the second interposer opposing the first side of the second interposer; and filling the first recess and the second recess with a first dielectric material.

A multi-chip device includes a first material within a substrate. The first material has a first coefficient of thermal expansion different than a second coefficient of thermal expansion of the substrate. A first chip overlies a first portion of the first material and a first portion of the substrate. A second chip overlies a second portion of the first material and a second portion of the substrate. The first material is between the first portion of the substrate and the second portion of the substrate.