An electronic device includes: a resin substrate that includes insulation resin on which wiring made of conductive material is provided; a heat-generation element that is a circuit element mounted on a first surface of the resin substrate, and is operated to generate heat; and a sealing resin that is provided on the first surface, and seals the heat-generation element. An opposite surface of the sealing resin opposite to a surface of the sealing resin in contact with the first surface is thermally connected to a heat radiation member and mounted on the heat radiation member. Each of the resin substrate and the sealing resin has a bend shape convex toward the opposite surface when each of surrounding temperatures is a normal temperature and has a linear expansion coefficient for maintaining a bend shape convex toward the opposite surface when each of the surrounding temperatures is a high temperature.

An apparatus including a circuit structure including a first side including a device layer including a plurality of devices and an opposite second side; an electrically conductive contact coupled to one of the plurality of devices on the first side; and an electrically conductive interconnect disposed on the second side of the structure and coupled to the conductive contact. A method including forming a transistor device including a channel between a source and a drain and a gate electrode on the channel defining a first side of the device; forming an electrically conductive contact to one of the source and the drain from the first side; and forming an interconnect on a second side of the device, wherein the interconnect is coupled to the contact.

A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.

A light-emitting diode (LED) package structure includes a substrate, an LED, a side wall, an encapsulant, and a waterproof protective coating. The LED is disposed on the substrate, the side wall defines a through hole and is disposed on the substrate, and the LED is accommodated in the through hole. The encapsulant is filled in the through hole and covers the LED. A heterojunction is disposed between the encapsulant and the side wall, and the waterproof protective coating seals the heterojunction. Furthermore, the encapsulant includes a first fluoropolymer, the waterproof protective coating includes a second fluoropolymer, and the light transmittance of the first fluoropolymer is greater than that of the second fluoropolymer.

A package structure includes a first RDL structure, a die, an encapsulant, a film, a TIV and a second RDL structure. The die is located over the first RDL structure. The encapsulant laterally encapsulates sidewalls of the die. The film is disposed between the die and the first RDL structure, and between the encapsulant and the first RDL structure. The TIV penetrates through the encapsulant and the film to connect to the first RDL structure. The second RDL structure is disposed on the die, the TIV and the encapsulant and electrically connected to die and the TIV.

In a described example, an apparatus includes a packaged device carrier having a board side surface and an opposing surface, the packaged device carrier having conductive leads having a first thickness spaced from one another; the conductive leads having a head portion attached to a dielectric portion, a middle portion extending from the head portion and extending away from the board side surface of the packaged device carrier at an angle to the opposing surface, and each lead having an end extending from the middle portion with a foot portion configured for mounting to a substrate.

A semiconductor package includes a first substrate, a first layer structure, a second layer structure, a first antenna layer and an electronic component. The first antenna layer is formed on at least one of the first layer structure and the second layer structure, wherein the first antenna layer has an upper surface flush with a layer upper surface of the first layer structure or the second layer structure. The electronic component is disposed on a substrate lower surface of the first substrate and exposed from the first substrate. The first layer structure is formed between the first substrate and the second layer structure.

A manufacturing method of a through electrode substrate includes: a step of preparing a substrate including a first surface and a second surface positioned oppositely to the first surface, and provided with a through hole; a step of providing a sealing layer blocking the through hole on the first surface of the substrate; an electrode forming step of forming a through electrode inside the through hole, the through electrode having a first part extending along a sidewall of the through hole, and a second part connected to the first part and spreading along the sealing layer; and a step of removing the sealing layer.

A method for forming an electronic chip assembly. A first metal plate is coupled to a first side of a substrate to form a backing plate. A first cavity is created extending through the substrate to extend at least to the first metal plate. An electronic component is bonded to the substrate such that the electronic component is located within the first cavity. A second metal plate, having a second cavity, is disposed to a second side of the substrate, and over the first cavity such that the electronic component is encased within the first and second cavities by the first and second metal plates.

A semiconductor device substrate is provided. The substrate includes an embedded trace substrate (ETS) portion. The ETS portion includes a first conductive layer embedded in the ETS portion at a first major surface. A portion of the first conductive layer is patterned to form a signal line. A non-conductive layer is disposed between the first conductive layer and a second conductive layer second embedded in the ETS portion. A third conductive layer is formed over the first major surface of the ETS portion. The third conductive layer is configured to form a stripline with the signal line of the first conductive layer.