The power module includes: an insulating substrate having an upper surface on which a semiconductor element is mounted; a base plate joined to a lower surface of the insulating substrate; a case member surrounding the insulating substrate and adhered to the base plate; a sealing resin provided in a region surrounded by the base plate and the case member, so as to seal the insulating substrate; and a holding plate projecting from an inner wall of the case member to above an outer peripheral portion of the insulating substrate, the holding plate being fixed to the inner wall, the holding plate being in contact with the sealing resin.

The power module includes: an insulating substrate having an upper surface on which a semiconductor element is mounted; a base plate joined to a lower surface of the insulating substrate; a case member surrounding the insulating substrate and adhered to the base plate; a sealing resin provided in a region surrounded by the base plate and the case member, so as to seal the insulating substrate; and a holding plate projecting from an inner wall of the case member to above an outer peripheral portion of the insulating substrate, the holding plate being fixed to the inner wall, the holding plate being in contact with the sealing resin.

A packaged semiconductor device comprises a semiconductor chip and a semiconductor package. The semiconductor package comprises: a metal carrier, wherein the semiconductor chip is arranged on a main surface of the metal carrier, a metal cap arranged on the main surface of the metal carrier, wherein the metal carrier and the metal cap form a cavity, wherein the semiconductor chip is arranged within the cavity, a connection conductor extending from the main surface of the metal carrier to a main surface of the semiconductor package through the metal carrier, wherein the connection conductor is electrically insulated from the metal carrier and is electrically connected to the semiconductor chip, and a connecting material arranged on a first region of the connection conductor and serving for electrically and mechanically connecting the connection conductor to an external printed circuit board, wherein at least that part of the connection conductor which extends from the main surface of the metal carrier as far as the first region of the connection conductor is formed in integral fashion.

A semiconductor device includes a first die; a second die attached over the first die; a first metal enclosure and a second metal enclosure both directly contacting and vertically extending between the first die and the second die, wherein the first metal enclosure peripherally encircles a set of one or more internal interconnects and the second metal enclosure peripherally encircles the first metal enclosure without directly contacting the first metal enclosure; a first enclosure connector electrically connecting the first metal enclosure to a first voltage level; a second enclosure connector electrically connecting the second metal enclosure to a second voltage level; and wherein the first metal enclosure, the second metal enclosure, the first enclosure connector, and the second enclosure connector are configured to provide an enclosure capacitance.

An oscillator includes a resonation element, a temperature sensitive element, a first package that houses the resonation element and the temperature sensitive element and is airtightly sealed, and a second package that houses the first package and is airtightly sealed. The first package includes a first base having a first recessed portion that is provided on one main surface side and a first lid that is joined to the first base so as to close an opening of the first recessed portion. The second package includes a second base having a second recessed portion that is provided on one main surface side and a second lid that is joined to the second base so as to close an opening of the second recessed portion.

An oscillator includes a resonation element, a temperature sensitive element, a first package that houses the resonation element and the temperature sensitive element and is airtightly sealed, and a second package that houses the first package and is airtightly sealed. The first package includes a first base having a first recessed portion that is provided on one main surface side and a first lid that is joined to the first base so as to close an opening of the first recessed portion. The second package includes a second base having a second recessed portion that is provided on one main surface side and a second lid that is joined to the second base so as to close an opening of the second recessed portion.

An oscillator includes a resonation element, a first package that houses the resonation element and airtightly sealed, a circuit element that is positioned outside the first package and electrically connected to the resonation element, and a second package that houses the first package and the circuit element and sealed in a depressurized state. In addition, the first package includes a first base having a first recessed portion, and a first lid joined to the first base so as to close an opening of the first recessed portion, and the second package includes a second base having a second recessed portion and a second lid joined to the second base so as to close an opening of the second recessed portion. The circuit element is attached to the first base, and the first base is attached to the second base.

A semiconductor package structure includes a substrate, a semiconductor die, a lid and a cap. The semiconductor die is disposed on the substrate. The lid is disposed on the substrate. The cap is disposed on the lid. The substrate, the lid and the cap define a cavity in which the semiconductor die is disposed, and a pressure in the cavity is greater than an atmospheric pressure outside the cavity.

A semiconductor package structure includes a substrate, a semiconductor die, a lid and a cap. The semiconductor die is disposed on the substrate. The lid is disposed on the substrate. The cap is disposed on the lid. The substrate, the lid and the cap define a cavity in which the semiconductor die is disposed, and a pressure in the cavity is greater than an atmospheric pressure outside the cavity.

A ball grid array (BGA) assembly can include a component substrate having at least one underfill channel defined therethrough providing fluidic communication between a first side of the component substrate and a second side of the component substrate, a plurality of pads or leads exposed on the second side and configured to be soldered to a mating PCB, a cover mounted to the component substrate defining a reservoir cavity between the first side and the cover, and an underfill material disposed within the reservoir cavity such that the underfill material can flow through the at least one underfill channel to a gap defined between the second side and the mating PCB when the component substrate is being soldered to the mating PCB.