Patent classifications
H01L23/20
Air cavity packages and methods for the production thereof
Air cavity packages and methods for producing air cavity packages containing sintered bonded components, multipart window frames, and/or other unique structural features are disclosed. In one embodiment, a method for fabricating an air cavity package includes the step or process of forming a first metal particle-containing precursor layer between a base flange and a window frame positioned over the base flange. A second metal particle-containing precursor layer is further formed between the base flange and a microelectronic device positioned over the base flange. The metal particle-containing precursor layers are sintered substantially concurrently at a maximum processing temperature less than melt point(s) of metal particles within the layers to produce a first sintered bond layer from the first precursor layer joining the window frame to the base flange and to produce a second sintered bond layer from the second precursor layer joining the microelectronic device to the base flange.
3D Printed Hermetic Package Assembly and Method
A method is provided. The method includes one or more of removing existing ball bonds from an extracted die, placing the extracted die into a recess of a hermetic substrate, the extracted die having a centered orientation in the recess, and applying a side fill compound into the recess between the extracted die and the hermetic substrate. The method also includes 3D printing, by a 3D printer, a plurality of bond connections between die pads of the extracted die and first bond pads of the hermetic substrate in order to create a 3D printed die substrate, and 3D printing a hermetic encapsulation over the die, the side fill compound, and the 3D printed bond connections in order to create a hermetic assembly. The extracted die includes a fully functional semiconductor die removed from a previous package. The hermetic substrate includes the first bond pads coupled to second bond pads.
3D Printed Hermetic Package Assembly and Method
A method is provided. The method includes one or more of removing existing ball bonds from an extracted die, placing the extracted die into a recess of a hermetic substrate, the extracted die having a centered orientation in the recess, and applying a side fill compound into the recess between the extracted die and the hermetic substrate. The method also includes 3D printing, by a 3D printer, a plurality of bond connections between die pads of the extracted die and first bond pads of the hermetic substrate in order to create a 3D printed die substrate, and 3D printing a hermetic encapsulation over the die, the side fill compound, and the 3D printed bond connections in order to create a hermetic assembly. The extracted die includes a fully functional semiconductor die removed from a previous package. The hermetic substrate includes the first bond pads coupled to second bond pads.
PRINTED CIRCUIT MODULE HAVING A SEMICONDUCTOR DEVICE WITH A PROTECTIVE LAYER IN PLACE OF A LOW-RESISTIVITY HANDLE LAYER
A printed circuit module having a protective layer in place of a low-resistivity handle layer and methods for manufacturing the same are disclosed. The printed circuit module includes a printed circuit substrate with a thinned die attached to the printed circuit substrate. The thinned die is an integrated passive die (IPD) without a silicon substrate layer. A protective layer is disposed over the IPD, wherein the protective layer has a thermal conductivity between 2 watts per meter Kelvin (W/mK) and 6600 W/mK and an electrical resistivity of greater than 10.sup.6 Ohm-cm.
PRINTED CIRCUIT MODULE HAVING A SEMICONDUCTOR DEVICE WITH A PROTECTIVE LAYER IN PLACE OF A LOW-RESISTIVITY HANDLE LAYER
A printed circuit module having a protective layer in place of a low-resistivity handle layer and methods for manufacturing the same are disclosed. The printed circuit module includes a printed circuit substrate with a thinned die attached to the printed circuit substrate. The thinned die is an integrated passive die (IPD) without a silicon substrate layer. A protective layer is disposed over the IPD, wherein the protective layer has a thermal conductivity between 2 watts per meter Kelvin (W/mK) and 6600 W/mK and an electrical resistivity of greater than 10.sup.6 Ohm-cm.
Method for Remapping a Packaged Extracted Die with 3D Printed Bond Connections
A method is provided. The method includes removing an extracted die including an original ball bond from a previous packaged integrated circuit, bonding the extracted die to an interposer to create a remapped extracted die, 3D printing one or more first bond connections between one or more original bond pads of the extracted die and one or more first bond pads of the interposer, securing the remapped extracted die to a package base, and 3D printing one or more second bond connections between one or more second bond pads of the interposer and one or more package leads or downbonds of the package base. The one or more first and second bond connections conform to the shapes and surfaces of the extracted die, the interposer, and the package base.
Remapped Packaged Extracted Die with 3D Printed Bond Connections
An integrated circuit is provided. The integrated circuit includes a package base including package leads, an extracted die removed from a previous packaged integrated circuit, and an an interposer bonded to the extracted die and the package base. The extracted die includes original bond pads and one or more original ball bonds on the original bond pads. The interposer includes first bond pads electrically connected to the original bond pads with 3D printed first bond connections conforming to the shapes and surfaces of the extracted die and the interposer and second bond pads electrically connected to the package leads with 3D printed second bond connections conforming to shapes and surfaces of the interposer and package base.
Remapped Packaged Extracted Die with 3D Printed Bond Connections
An integrated circuit is provided. The integrated circuit includes a package base including package leads, an extracted die removed from a previous packaged integrated circuit, and an an interposer bonded to the extracted die and the package base. The extracted die includes original bond pads and one or more original ball bonds on the original bond pads. The interposer includes first bond pads electrically connected to the original bond pads with 3D printed first bond connections conforming to the shapes and surfaces of the extracted die and the interposer and second bond pads electrically connected to the package leads with 3D printed second bond connections conforming to shapes and surfaces of the interposer and package base.
Repackaged integrated circuit and assembly method
A packaged integrated circuit for operating reliably at elevated temperatures is provided. The packaged integrated circuit includes a reconditioned die, which includes a fully functional semiconductor die that has been previously extracted from a different packaged integrated circuit. The packaged integrated circuit also includes a hermetic package comprising a base and a lid and a plurality of bond wires. The reconditioned die is placed into a cavity in the base. After the reconditioned die is placed into the cavity, the plurality of bond wires are bonded between pads of the reconditioned die and package leads of the hermetic package base or downbonds. After bonding the plurality of bond wires, the lid is sealed to the base.
SOLID STATE DRIVE OPTIMIZED FOR WAFERS
An SSD with a package optimized for semiconductor wafers is configured by thinning a plurality of undiced wafers and stacking the wafers. The wafers are connected to each other by TSV. A subset of the wafers include memory circuits. One of the wafer not in the subset includes peripheral circuits. A casing houses the wafers.