A bypass thyristor device includes a semiconductor device providing a thyristor with a cathode electrode on a cathode side, a gate electrode on the cathode side surrounded by the cathode electrode and an anode electrode on an anode side; an electrically conducting cover element arranged on the cathode side and in electrical contact with the cathode electrode on a contact side; and a gate contact element electrically connected to the gate electrode and arranged in a gate contact opening in the contact side of the cover element; wherein the cover element has a gas expansion volume in the contact side facing the cathode side, which gas expansion volume is interconnected with the gate contact opening for gas exchange.

A bypass thyristor device includes a semiconductor device providing a thyristor with a cathode electrode on a cathode side, a gate electrode on the cathode side surrounded by the cathode electrode and an anode electrode on an anode side; an electrically conducting cover element arranged on the cathode side and in electrical contact with the cathode electrode on a contact side; and a gate contact element electrically connected to the gate electrode and arranged in a gate contact opening in the contact side of the cover element; wherein the cover element has a gas expansion volume in the contact side facing the cathode side, which gas expansion volume is interconnected with the gate contact opening for gas exchange.

A MEMS device comprises an electro mechanical element in a sealed chamber containing a gas comprising a reactive gas selected to react with any contaminants that may be present or formed on the operating surfaces of the device in a manner to maximize the electrical conductivity of the surfaces during operation of the device. The MEMS device may comprise a MEMS switch having electrical contacts as the operating surfaces. The reactive gas may comprise hydrogen or an azane, optionally mixed with an inert gas, or any combination of the gases. The corresponding process provides a means to substantially reduce or eliminate contaminants present or formed on the operating surfaces of MEMS devices in a manner to maximize the electrical conductivity of the surfaces during operation of the devices.

Disclosed are a packaging cover plate, an organic light-emitting diode display and a manufacturing method therefor. The packaging cover plate comprises: a cover plate body, the cover plate body being provided with open slots; cover plugs for covering openings at two ends of the open slots; and water absorption layers for at least covering mouths of the open slots. By means of the arranged open slots, the packaging cover plate can conveniently introduce a dry gas. In addition, the water absorption layers absorb water vapour, the introduced dry gas dries the water absorption layers, and the water vapour and oxygen in the water absorption layers can be taken away by means of the circular flow of the dry gas, so that damage to a device by water vapour and oxygen can be reduced, and the packaging effect is better.

A ball grid array (BGA) assembly can include a component substrate having at least one underfill channel defined therethrough providing fluidic communication between a first side of the component substrate and a second side of the component substrate, a plurality of pads or leads exposed on the second side and configured to be soldered to a mating PCB, a cover mounted to the component substrate defining a reservoir cavity between the first side and the cover, and an underfill material disposed within the reservoir cavity such that the underfill material can flow through the at least one underfill channel to a gap defined between the second side and the mating PCB when the component substrate is being soldered to the mating PCB.

A semiconductor package structure includes a substrate, a semiconductor die, a lid and a cap. The semiconductor die is disposed on the substrate. The lid is disposed on the substrate. The cap is disposed on the lid. The substrate, the lid and the cap define a cavity in which the semiconductor die is disposed, and a pressure in the cavity is greater than an atmospheric pressure outside the cavity.

A semiconductor package structure includes a substrate, a semiconductor die, a lid and a cap. The semiconductor die is disposed on the substrate. The lid is disposed on the substrate. The cap is disposed on the lid. The substrate, the lid and the cap define a cavity in which the semiconductor die is disposed, and a pressure in the cavity is greater than an atmospheric pressure outside the cavity.

The present invention relates to a millimeter wave radar component package, comprising: a box cover, having a metal layer arranged on inner surface of the box cover, the metal layer facing a channel of a box body, wherein a cavity is formed between the box cover and the box body; and the box body, comprising: a first insulator, connected with the box cover, wherein in the first insulator a channel is opened, and one end of the channel corresponds with the position of antenna and the other end is connected with the cavity; one or more chips, arranged on a second insulator in a flip manner and covered by the first insulator; the second insulator, arranged between the first insulator and a third insulator; the third insulator; and the antenna and conductive lines, arranged in the third insulator and connected with pads of the one or more chips through the second insulator, wherein the conductive lines are exposed from the third insulator for electrical contact. The present invention further relates to a method for manufacturing the package.

The present invention relates to a millimeter wave radar component package, comprising: a box cover, having a metal layer arranged on inner surface of the box cover, the metal layer facing a channel of a box body, wherein a cavity is formed between the box cover and the box body; and the box body, comprising: a first insulator, connected with the box cover, wherein in the first insulator a channel is opened, and one end of the channel corresponds with the position of antenna and the other end is connected with the cavity; one or more chips, arranged on a second insulator in a flip manner and covered by the first insulator; the second insulator, arranged between the first insulator and a third insulator; the third insulator; and the antenna and conductive lines, arranged in the third insulator and connected with pads of the one or more chips through the second insulator, wherein the conductive lines are exposed from the third insulator for electrical contact. The present invention further relates to a method for manufacturing the package.

A semiconductor device includes a first die; a second die attached over the first die; a metal enclosure directly contacting and extending between the first die and the second die, wherein the first metal enclosure is continuous and encircles a set of one or more internal interconnects, wherein the first metal enclosure is configured to electrically connect to a first voltage level; and a second metal enclosure directly contacting and extending between the first die and the second die, wherein the second metal enclosure is continuous and encircles the first metal enclosure and is configured to electrically connect to a second voltage level; wherein the first metal enclosure and the second metal enclosure are configured to provide an enclosure capacitance encircling the set of one or more internal interconnects for shielding signals on the set of one or more internal interconnects.