A semiconductor device includes: a semiconductor element; a laminated substrate including an insulating plate and a circuit board which is arranged on the front surface of the insulating plate and on which the semiconductor element is arranged; a lead terminal provided via solder in a major electrode of the front surface of the semiconductor element; and a sealing resin for sealing the semiconductor element, the laminated substrate, and the lead terminal, wherein a value of Young's modulus of the sealing resin(linear expansion coefficient of the lead terminallinear expansion coefficient of the sealing resin) is equal to or greater than 2610.sup.3 (Pa/ C.) and equal to or less than 5010.sup.3 (Pa/ C.).

A semiconductor module includes a power electronics carrier including a metallization layer disposed on an electrically insulating substrate, a power semiconductor die mounted on the power electronics carrier, a housing that surrounds an interior volume over the power electronics carrier, an electrically insulating encapsulant within the interior volume that encapsulates the power semiconductor die, wherein the electrically insulating encapsulant is configured to transform during operation of the power semiconductor die such that a liquified envelope of the electrically insulating encapsulant surrounds the power semiconductor die and such that a solid outer region of the electrically insulating encapsulant surrounds the liquified envelope.

A method of forming a semiconductor device includes the following operations: (i) receiving a precursor package including a precursor substrate and a plurality of semiconductor packages on the precursor substrate, in which a gap is presented between the precursor substrate and each of the semiconductor packages; (ii) forming underfill material filling the gaps; (iii) cutting the precursor substrate along a region between adjacent ones of the semiconductor packages to form a plurality of discrete package-on-package devices; and (iv) applying supplemental underfill material to one of the package-on-package devices.

A system and method for packaging semiconductor device is provided. An embodiment comprises forming vias over a carrier wafer and attaching a first die over the carrier wafer and between a first two of the vias. A second die is attached over the carrier wafer and between a second two of the vias. The first die and the second die are encapsulated to form a first package, and at least one third die is connected to the first die or the second die. A second package is connected to the first package over the at least one third die. Alternatively, instead of forming vias over the carrier wafer, through silicon vias may be formed within a semiconductor substrate and the semiconductor substrate may be attached to the carrier wafer.

A power semiconductor module arrangement includes: a substrate arranged in or forming a ground surface of a housing having sidewalls; at least one semiconductor body arranged on the substrate; a first layer partly filling the housing and completely covering the substrate and the at least one semiconductor body arranged thereon; and a second layer arranged adjacent to the first layer. The first layer is a liquid or gel-like layer. The second layer is a solid or gel-like layer. The first layer is arranged between the substrate and the second layer. The second layer is arranged distant from a top of the housing.

A system and a method of manufacture thereof of integrated circuit packaging system, including: a pillar; a conductive buildup attached to the pillar; and a molded body encapsulating the conductive buildup, the pillar extending out of the molded body.

A semiconductor device includes a substrate, an interconnection layer, an outgassing layer, and a patterned outgassing barrier layer. The interconnection layer is over the substrate. The outgassing layer is over the interconnection layer. The patterned outgassing barrier layer is over the outgassing layer. The patterned outgassing barrier layer includes a plurality of barrier structures and a plurality of openings. The plurality of openings expose a portion of an upmost surface of the outgassing layer, and a bottommost surface of the patterned outgassing barrier layer is substantially coplanar with the upmost surface of the outgassing layer.

An organic light emitting diode display device is provided, which comprises: a first substrate having a first surface with a first side; and a glass-forming sealant disposed thereon, adjacent to the first side and having a top surface, a bottom surface opposite to the top surface, and a middle surface therebetween. The middle surface has a first end connecting to the top surface, a second end connecting to the bottom surface and a third end therebetween. A first distance between a first projection of the first end on the first surface and the first side is unequal to a second distance between a second projection of the second end on the first surface and the first side; and a third distance between a third projection of the third end on the first surface and the first side is shorter than the first or second distance.

Embodiments disclosed herein include an electronic package. In an embodiment, the electronic package comprises a package substrate having a first surface and a second surface opposite from the first surface, and a die on the first surface of the package substrate. In an embodiment, the electronic package further comprises a socket interface on the second surface of the package substrate. In an embodiment, the socket interface comprises a first layer, wherein the first layer comprises a plurality of wells, a liquid metal within the plurality of wells, and a second layer over the plurality of wells.

Embodiments disclosed herein include an electronic package. In an embodiment, the electronic package comprises a package substrate having a first surface and a second surface opposite from the first surface, and a die on the first surface of the package substrate. In an embodiment, the electronic package further comprises a socket interface on the second surface of the package substrate. In an embodiment, the socket interface comprises a first layer, wherein the first layer comprises a plurality of wells, a liquid metal within the plurality of wells, and a second layer over the plurality of wells.