Patent classifications
H01L23/22
Thermal management solutions for embedded integrated circuit devices
An integrated circuit structure may be formed having a substrate, at least one integrated circuit device embedded in and electrically attached to the substrate, and a heat transfer fluid conduit extending through the substrate. In one embodiment, the heat transfer fluid conduit may be lined with a metallization within the substrate. In a further embodiment, the heat transfer fluid conduit may comprise multiple fluid channels for the removal of heat from multiple surfaces of the at least one integrated circuit device. In still a further embodiment, the substrate may include a molded layer, wherein at least one fluid channel is formed in the molded layer.
Thermal management solutions for embedded integrated circuit devices
An integrated circuit structure may be formed having a substrate, at least one integrated circuit device embedded in and electrically attached to the substrate, and a heat transfer fluid conduit extending through the substrate. In one embodiment, the heat transfer fluid conduit may be lined with a metallization within the substrate. In a further embodiment, the heat transfer fluid conduit may comprise multiple fluid channels for the removal of heat from multiple surfaces of the at least one integrated circuit device. In still a further embodiment, the substrate may include a molded layer, wherein at least one fluid channel is formed in the molded layer.
Electronic assembly, package structure having hollow cylinders and method of fabricating the same
A package structure includes at least one semiconductor die, a plurality of hollow cylinders, an insulating encapsulant, a redistribution layer and through holes. The plurality of hollow cylinders is surrounding the at least one semiconductor die. The insulating encapsulant has a top surface and a bottom surface opposite to the top surface, wherein the insulating encapsulant encapsulates the at least one semiconductor die and the plurality of hollow cylinders. The redistribution layer is disposed on the top surface of the insulant encapsulant and over the at least one semiconductor die. The through holes are penetrating through the plurality of hollow cylinders.
Semiconductor package device
A semiconductor package device includes a package substrate, an interposer on the package substrate, a semiconductor package on the interposer, and an under-fill between the interposer and the semiconductor package. The interposer includes at least one first trench at an upper portion of the interposer that extends in a first direction parallel to a top surface of the package substrate. The at least one first trench vertically overlaps an edge region of the semiconductor package. The under-fill fills at least a portion of the at least one trench.
Semiconductor package device
A semiconductor package device includes a package substrate, an interposer on the package substrate, a semiconductor package on the interposer, and an under-fill between the interposer and the semiconductor package. The interposer includes at least one first trench at an upper portion of the interposer that extends in a first direction parallel to a top surface of the package substrate. The at least one first trench vertically overlaps an edge region of the semiconductor package. The under-fill fills at least a portion of the at least one trench.
Integrating Josephson amplifiers or Josephson mixers into printed circuit boards
An aspect includes one or more board layers. A first chip cavity is formed within the one or more board layers, wherein a first Josephson amplifier or Josephson mixer is disposed within the first chip cavity. The first Josephson amplifier or Josephson mixer comprises at least one port, each port connected to at least one connector disposed on at least one of the one or more board layers, wherein at least one of the one or more board layers comprises a circuit trace formed on the at least one of the one or more board layers.
CRACK IDENTIFICATION IN IC CHIP PACKAGE USING ENCAPSULATED LIQUID PENETRANT CONTRAST AGENT
A packaging fill material for electrical packaging includes a base material, and a plurality of frangible capsules distributed in the base material. Each frangible capsule includes a liquid penetrant contrast agent therein having a different radiopacity than the base material. In response to a crack forming in the packaging fill material, at least one of the plurality of frangible capsules opens, releasing the liquid penetrant contrast agent into the crack. Cracks can be more readily identified in an IC package including the packaging fill material. The liquid penetrant contrast agent may have a radiopacity that is higher than the base material. Inspection can be carried out using electromagnetic analysis using visual inspection or digital analysis of the results to more easily identify cracks.
CRACK IDENTIFICATION IN IC CHIP PACKAGE USING ENCAPSULATED LIQUID PENETRANT CONTRAST AGENT
A packaging fill material for electrical packaging includes a base material, and a plurality of frangible capsules distributed in the base material. Each frangible capsule includes a liquid penetrant contrast agent therein having a different radiopacity than the base material. In response to a crack forming in the packaging fill material, at least one of the plurality of frangible capsules opens, releasing the liquid penetrant contrast agent into the crack. Cracks can be more readily identified in an IC package including the packaging fill material. The liquid penetrant contrast agent may have a radiopacity that is higher than the base material. Inspection can be carried out using electromagnetic analysis using visual inspection or digital analysis of the results to more easily identify cracks.
TECHNOLOGIES FOR LIQUID METAL MIXTURES FOR ELECTRICAL INTERCONNECTS
Technologies for liquid metal mixtures for electrical interconnects are disclosed. In the illustrative embodiment, a gallium mixture includes gallium or gallium alloy mixed with fine particles of, e.g., gallium oxide. The fine particles change properties of the gallium or gallium alloy, such as the viscosity, surface tension, and surface bonding. As a result of the changes caused by the fine particles, the gallium mixture can be more easily integrated into electrical interconnects, such as by using screen printing techniques. In one embodiment, the gallium mixture may form an array of interconnects on an integrated circuit component for connecting to another integrated circuit component.
TECHNOLOGIES FOR LIQUID METAL MIXTURES FOR ELECTRICAL INTERCONNECTS
Technologies for liquid metal mixtures for electrical interconnects are disclosed. In the illustrative embodiment, a gallium mixture includes gallium or gallium alloy mixed with fine particles of, e.g., gallium oxide. The fine particles change properties of the gallium or gallium alloy, such as the viscosity, surface tension, and surface bonding. As a result of the changes caused by the fine particles, the gallium mixture can be more easily integrated into electrical interconnects, such as by using screen printing techniques. In one embodiment, the gallium mixture may form an array of interconnects on an integrated circuit component for connecting to another integrated circuit component.