Patent classifications
H01L23/26
Organic light emitting diode display panel and packaging method thereof
Provided are an organic light emitting diode display panel and packaging method thereof. The organic light emitting diode display panel is provided with an adhesive layer on a passivation layer corresponding to a position of a sealant. When packaging the organic light emitting diode, the sealant on a cover plate is adhered corresponding to a position of the adhesive layer. The adhesive layer has a good bonding force with the sealant and also has a good bonding force with the passivation layer. Thus, water vapor does not easily enter the organic light emitting diode element, which will not reduce the performance of the organic light emitting diode element to improve a service life of organic light emitting diode element and to possess a good reliability performance.
Semiconductor package with inner and outer cavities
A semiconductor package structure includes a substrate, a semiconductor die, a lid and a cap. The semiconductor die is disposed on the substrate. The lid is disposed on the substrate. The cap is disposed on the lid. The substrate, the lid and the cap define a cavity in which the semiconductor die is disposed, and a pressure in the cavity is greater than an atmospheric pressure outside the cavity.
Semiconductor package with inner and outer cavities
A semiconductor package structure includes a substrate, a semiconductor die, a lid and a cap. The semiconductor die is disposed on the substrate. The lid is disposed on the substrate. The cap is disposed on the lid. The substrate, the lid and the cap define a cavity in which the semiconductor die is disposed, and a pressure in the cavity is greater than an atmospheric pressure outside the cavity.
METHOD FOR FABRICATING A DETECTION DEVICE COMPRISING A STEP OF DIRECT BONDING OF A THIN SEALING LAYER PROVIDED WITH A GETTER MATERIAL
The invention relates to a method for fabricating a thermal detector (1), comprising the following steps: forming a first stack (10), comprising a thermal detector (20), a mineral sacrificial layer (15) and a thin encapsulation layer (16) having a lateral vent (17.1); forming a second stack (30), comprising a thin sealing layer (33) and a getter portion (34); eliminating the mineral sacrificial layer (15); assembling by direct bonding the thin sealing layer (33), brought into contact with the thin encapsulation layer (16) and blocking the lateral vent (17.1), the getter portion (34) being located in the lateral vent (17.1).
ORGANIC LIGHT EMITTING DIODE DISPLAY PANEL AND PACKAGING METHOD THEREOF
Provided are an organic light emitting diode display panel and packaging method thereof. The organic light emitting diode display panel is provided with an adhesive layer on a passivation layer corresponding to a position of a sealant. As packaging the organic light emitting diode, the sealant on a cover plate is adhered corresponding to a position of the adhesive layer. The adhesive layer has a good bonding force with the sealant and also has a good bonding force with the passivation layer. Thus, water vapor does not easily enter the organic light emitting diode element, which will not reduce the performance of the organic light emitting diode element to improve a service life of organic light emitting diode element and to possess a good reliability performance.
SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor element and a first connection member. The semiconductor element includes a substrate and an electrode pad. The substrate includes a transistor formation region, in which a transistor is formed and which is shaped to be non-quadrangular. The electrode pad is located on the transistor formation region. The first connection member is connected to the electrode pad at one location. The electrode pad is arranged to cover a center of gravity of the transistor formation region in a plan view of the electrode pad. In the plan view, a connection region in which the first connection member is connected to the electrode pad includes a center of gravity position of the transistor formation region.
SEMICONDUCTOR-ON-INSULATOR (SOI) SUBSTRATE AND METHOD FOR FORMING
Various embodiments of the present application are directed towards a method for forming a semiconductor-on-insulator (SOI) substrate with a thick device layer and a thick insulator layer. In some embodiments, the method includes forming an insulator layer covering a handle substrate, and epitaxially forming a device layer on a sacrificial substrate. The sacrificial substrate is bonded to a handle substrate, such that the device layer and the insulator layer are between the sacrificial and handle substrates, and the sacrificial substrate is removed. The removal includes performing an etch into the sacrificial substrate until the device layer is reached. Because the device layer is formed by epitaxy and transferred to the handle substrate, the device layer may be formed with a large thickness. Further, because the epitaxy is not affected by the thickness of the insulator layer, the insulator layer may be formed with a large thickness.
MITIGATING MOISTURE-DRIVEN DEGRADATION OF FEATURES DESIGNED TO PREVENT STRUCTURAL FAILURE OF SEMICONDUCTOR WAFERS
Moisture-driven degradation of a crack stop in a semiconductor die is mitigated by forming a groove in an upper surface of the die between an edge of the die and the crack stop; entirely filling the groove with a moisture barrier material; preventing moisture penetration of the semiconductor die by presence of the moisture barrier material; and dissipating mechanical stress in the moisture barrier material without presenting a stress riser in the bulk portion of the die. The moisture barrier material is at least one of moisture-absorbing, moisture adsorbing, and hydrophobic.
MITIGATING MOISTURE-DRIVEN DEGRADATION OF FEATURES DESIGNED TO PREVENT STRUCTURAL FAILURE OF SEMICONDUCTOR WAFERS
Moisture-driven degradation of a crack stop in a semiconductor die is mitigated by forming a groove in an upper surface of the die between an edge of the die and the crack stop; entirely filling the groove with a moisture barrier material; preventing moisture penetration of the semiconductor die by presence of the moisture barrier material; and dissipating mechanical stress in the moisture barrier material without presenting a stress riser in the bulk portion of the die. The moisture barrier material is at least one of moisture-absorbing, moisture adsorbing, and hydrophobic.
Methods and apparatus for gettering impurities in semiconductors
Methods and apparatus for gettering impurities in semiconductors are disclosed. A disclosed example multilayered die includes a substrate material, a component layer below the substrate material, and an impurity attractant region disposed in the substrate material.