H01L23/293

Resin composition, resin sheet, laminate, and semiconductor element
11512200 · 2022-11-29 · ·

A resin composition contains a (A) thermoplastic component, a (B) thermosetting component, and a (C) inorganic filler, 5%-weight-reduction temperature of a hardened substance of the resin composition being 440 degrees C. or more.

SEMICONDUCTOR MODULE
20220375810 · 2022-11-24 ·

Provided is a semiconductor module, including: a semiconductor chip including a semiconductor substrate and a metal electrode provided above the semiconductor substrate; a protective film provided above the metal electrode; a plated layer provided above the metal electrode, having at least a part being in a height identical to the protective film; a solder layer provided above the plated layer; and a lead frame provided above the solder layer, wherein the plated layer is provided in a range not in contact with the protective film.

Curable resin film and first protective film forming sheet
11594458 · 2023-02-28 · ·

This curable resin film forms a first protective film on a surface having bumps of a semiconductor wafer by being attached to the surface and being cured, in which a cured material of the curable resin film has a Young's modulus of equal to or greater than 0.02 MPa and a peak value of a load measured by a probe tack test at 80° C. is equal to or less than 500 g. A first protective film forming sheet is provided with a first supporting sheet, and the curable resin film is provided on one surface of the first supporting sheet.

Semiconductor package and method

In an embodiment, a device includes: a first redistribution structure including a first dielectric layer; a die adhered to a first side of the first redistribution structure; an encapsulant laterally encapsulating the die, the encapsulant being bonded to the first dielectric layer with first covalent bonds; a through via extending through the encapsulant; and first conductive connectors electrically connected to a second side of the first redistribution structure, a subset of the first conductive connectors overlapping an interface of the encapsulant and the die.

CURABLE COMPOSITION
20230054785 · 2023-02-23 · ·

Provided is a curable composition having excellent workability and being capable of forming a cured product having super heat resistance by curing. The curable composition of the present disclosure includes a curable compound represented by Formula (1) below and a radical polymerization initiator. In the following formula, R.sup.1 and R.sup.2 each represent a curable functional group, and D.sup.1 and D.sup.2 each represent a single bond or a linking group. L represents a divalent group having a repeating unit containing a structure represented by Formula (I) below and a structure represented by Formula (II) below. Ar.sup.1 to A.sup.3 each represent an arylene group or a group in which two or more arylene groups are bonded via a single bond or a linking group. X represents —CO—, —S—, or —SO.sub.2—, and Y represents —S—, —SO.sub.2—, —O—, —CO—, —COO—, or —CONH—. n represents an integer of 0 or greater.

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Dry Film
20230053355 · 2023-02-23 ·

This disclosure relates to a dry film structure that includes a carrier substrate; and a dielectric film supported by the carrier substrate. The dielectric film includes at least one dielectric polymer and low amounts of metals.

EDGE ENCAPSULATION FOR HIGH VOLTAGE DEVICES

A semiconductor device architecture includes a silicon substrate having sidewalls that are passivated by encapsulating the sidewalls in dielectric materials having high electric field strength. Encapsulating all the sidewalls using high field strength dielectric materials eliminates electrical paths in air or vacuum and confines the electric fields in these high field strength materials, increasing the breakdown voltage relative to unencapsulated devices and allowing the device to withstand greater standoff voltages. In some cases, encapsulating the sidewalls in this manner can allow the device to withstand voltages of 500V or greater.

Semiconductor device

Disclosed is a semiconductor device comprising a semiconductor substrate, a conductive pad on a first surface of the semiconductor substrate, a passivation layer on the first surface of the semiconductor substrate, the passivation layer having a first opening that exposes the conductive pad, an organic dielectric layer on the passivation layer, the organic dielectric layer having a second opening, and a bump structure on the conductive pad and in the first and second openings. The organic dielectric layer includes a material different from a material of the passivation layer. The second opening is spatially connected to the first opening and exposes a portion of the passivation layer. The bump structure includes a pillar pattern in contact with the passivation layer and the organic dielectric layer.

Flexible device including conductive traces with enhanced stretchability

Flexible devices including conductive traces with enhanced stretchability, and methods of making and using the same are provided. The circuit die is disposed on a flexible substrate. Electrically conductive traces are formed in channels on the flexible substrate to electrically contact with contact pads of the circuit die. A first polymer liquid flows in the channels to cover a free surface of the traces. The circuit die can also be surrounded by a curing product of a second polymer liquid.

SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

Semiconductor package includes interposer, dies, encapsulant. Each die includes active surface, backside surface, side surfaces. Backside surface is opposite to active surface. Side surfaces join active surface to backside surface. Encapsulant includes first material and laterally wraps dies. Dies are electrically connected to interposer and disposed side by side on interposer with respective backside surfaces facing away from interposer. At least one die includes an outer corner. A rounded corner structure is formed at the outer corner. The rounded corner structure includes second material different from first material. The outer corner is formed by backside surface and a pair of adjacent side surfaces of the at least one die. The side surfaces of the pair have a common first edge. Each side surface of the pair does not face other dies and has a second edge in common with backside surface of the at least one die.