A transistor includes a plurality of gate fingers that extend in a first direction and are spaced apart from each other in a second direction, each of the gate fingers comprising at least spaced-apart and generally collinear first and second gate finger segments that are electrically connected to each other. The first gate finger segments are separated from the second gate finger segments in the first direction by a gap region that extends in the second direction. A resistor is disposed in the gap region.

An embodiment includes first, second, and third metal layers; first, second, and third metal lines included in the second metal layer; a layer including airgaps, the first metal layer being between the layer including airgaps and the second metal layer; a first void between the first and second metal lines and a second void between the second and third metal lines; a conformal layer between the first and second metal lines; an additional layer between the first and second metal layers; wherein the first void includes air and the second void includes air; wherein a first axis intersects the first, second, and third metal lines and the first and second voids; wherein a second axis, orthogonal to the first axis, intersects the conformal layer and the additional layer; wherein a third axis, orthogonal to the first axis, intersects the second metal line and the additional layer.

Connection with a wiring structure can be reliably achieved, whereby a semiconductor sensor device and a semiconductor sensor device manufacturing method with increased reliability are provided. A semiconductor sensor device in which a multiple of signal lines and a sensor detection portion are disposed includes a conductive film, disposed on a substrate, that configures the signal lines and whose upper face is exposed by an aperture portion of a width smaller than a width of the signal lines, a conductive member formed on the conductive film and electrically connected to the conductive film via the aperture portion, and a wiring structure, formed on an upper face of the conductive member, of an air bridge structure that connects the signal lines or the signal lines and the sensor detection portion, wherein an upper surface of the conductive member is in contact with the wiring structure, and a side face is exposed.

An object is to provide a technique capable of increasing a heat radiation property in radiating a heat generated in a shunt resistance. A semiconductor device includes: a container body having a space with an opening; a semiconductor chip, a shunt resistance, and a circuit pattern disposed in the space in the container body; a partition member; a first cover; and a second cover. The partition member separates the space in the container body into a first space and a second space. The first cover covers a part of the opening corresponding to the first space, and the second cover covers a part of the opening corresponding to the second space. At least one hole through which the second space and outside of the container body are communicated with each other is formed in the second cover or by the second cover.

An integrated circuit (IC) die (100) is disclosed having a major surface delimited by at least one edge (102) of the IC die, said major surface carrying a plurality of electrically conductive contact plates (130) extending from said major surface beyond the at least one edge such that each contact plate includes an exposed contact surface portion (132) delimited by the at least one edge for mating with an electrically conductive further contact surface portion (230) on at least one further edge (220) of a body (200), said at least one further edge delimiting a cavity for receiving the IC die. An ultrasound probe including such an IC die and a method of providing such an IC die with contacts are also disclosed.

A multi-finger transistor including plural control electrodes (2), plural first electrodes (3), and plural second electrodes (4) is provided on a semiconductor substrate (1). A resin film (14,15) covers the transistor. A first wiring (8) electrically connecting the plural first electrodes (3) to one other is provided on the resin film (14,15). The resin film (14,15) covers contact portions between the first wiring (8) and the plural first electrodes (3). A first hollow structure (16) sealed with the resin film (14,15) is provided around the plural control electrodes (2) and the plural second electrodes (4).

An embodiment includes first, second, and third metal layers; first, second, and third metal lines included in the second metal layer; a layer including airgaps, the first metal layer being between the layer including airgaps and the second metal layer; a first void between the first and second metal lines and a second void between the second and third metal lines; a conformal layer between the first and second metal lines; an additional layer between the first and second metal layers; wherein the first void includes air and the second void includes air; wherein a first axis intersects the first, second, and third metal lines and the first and second voids; wherein a second axis, orthogonal to the first axis, intersects the conformal layer and the additional layer; wherein a third axis, orthogonal to the first axis, intersects the second metal line and the additional layer.

A method for forming a semiconductor device includes: providing a structure having a first stop layer formed above a substrate, a first dielectric layer formed on the first stop layer, a second stop layer formed on the first dielectric layer, and conductive lines formed in the first dielectric layer and spaced apart from each other; forming a first dummy layer on the second stop layer; patterning the first dummy layer to form a first patterned dummy layer; forming a second dummy layer on the first dummy layer to form a first trench; etching back the second dummy layer and the first patterned dummy layer to form a second trench, wherein the second trench is self-aligned with the first trench. The second trench extends downwardly to the first dielectric layer and forms an opening at the second stop layer.

According to one embodiment, a semiconductor device includes a first semiconductor chip including a first metal pad and a second metal pad; and a second semiconductor chip including a third metal pad and a fourth metal pad, the third metal pad joined to the first metal pad, the fourth metal pad coupled to the second metal pad via a dielectric layer, wherein the second semiconductor chip is coupled to the first semiconductor chip via the first metal pad and the third metal pad.

Various embodiments are disclosed for improved and structurally optimized transistors, such as RF power amplifier transistors. A transistor may include a drain metal portion raised from a surface of a substrate, a drain metal having a notched region, a gate manifold body with angled gate tabs extending from the gate manifold, and/or a source-connected shielding. The transistor may include a high-electron-mobility transistor (HEMT), a gallium nitride (GaN)-on-silicon transistor, a GaN-on-silicon-carbide transistor, or other type of transistor.