In a semiconductor device, a frame includes a first frame portion extending in a direction parallel to a connection surface to be connected to the connection surface and a second frame portion connecting a case and the first frame portion. The first frame portions are divided into a plurality of divided portions. At least one divided portion in the plurality of divided portions in the first frame portions is an elastic portion which can be elastically deformed from a first state where a tip end portion is inclined to be located on a lower side of the connection surface to a second state where the tip end portion extends in a direction parallel to the connection surface. The divided portion as the elastic portion is connected to the connection surface while being elastically deformed from the first state to the second state.

In a semiconductor device, a frame includes a first frame portion extending in a direction parallel to a connection surface to be connected to the connection surface and a second frame portion connecting a case and the first frame portion. The first frame portions are divided into a plurality of divided portions. At least one divided portion in the plurality of divided portions in the first frame portions is an elastic portion which can be elastically deformed from a first state where a tip end portion is inclined to be located on a lower side of the connection surface to a second state where the tip end portion extends in a direction parallel to the connection surface. The divided portion as the elastic portion is connected to the connection surface while being elastically deformed from the first state to the second state.

A semiconductor device includes an integrated circuit attached to a chip carrier in a flip chip configuration. A substrate extends to a back surface of the integrated circuit, and an interconnect region extends to a front surface of the integrated circuit. A substrate bond pad is disposed at the front surface, and is electrically coupled through the interconnect region to the semiconductor material. The chip carrier includes a substrate lead at a front surface of the chip carrier. The substrate lead is electrically coupled to the substrate bond pad. An electrically conductive compression sheet is disposed on the back surface of the integrated circuit, with lower compression tips making electrical contact with the semiconductor material in the substrate. The electrically conductive compression sheet is electrically coupled to the substrate lead of the chip carrier by a back surface shunt disposed outside of the integrated circuit.

A semiconductor device includes an integrated circuit attached to a chip carrier in a flip chip configuration. A substrate extends to a back surface of the integrated circuit, and an interconnect region extends to a front surface of the integrated circuit. A substrate bond pad is disposed at the front surface, and is electrically coupled through the interconnect region to the semiconductor material. The chip carrier includes a substrate lead at a front surface of the chip carrier. The substrate lead is electrically coupled to the substrate bond pad. An electrically conductive compression sheet is disposed on the back surface of the integrated circuit, with lower compression tips making electrical contact with the semiconductor material in the substrate. The electrically conductive compression sheet is electrically coupled to the substrate lead of the chip carrier by a back surface shunt disposed outside of the integrated circuit.

A package for a semiconductor device includes a metal base plate, a wall portion, a first metal film, and a lead portion. The base plate has a first region and a second region surrounding the first region. The wall portion has a first frame body comprising metal and a second frame body comprising resin. The first frame body is provided on the second region. The second frame body is provided on the first frame body. The first metal film is provided on the second frame body. The lead portion is conductively bonded to the first metal film. The first frame body is conductively bonded to the base plate. A thickness of the first frame body in a first direction that is a direction in which the first frame body and the second frame body are arranged is larger than a thickness of the first metal film in the first direction.

A package for a semiconductor device includes a metal base plate, a wall portion, a first metal film, and a lead portion. The base plate has a first region and a second region surrounding the first region. The wall portion has a first frame body comprising metal and a second frame body comprising resin. The first frame body is provided on the second region. The second frame body is provided on the first frame body. The first metal film is provided on the second frame body. The lead portion is conductively bonded to the first metal film. The first frame body is conductively bonded to the base plate. A thickness of the first frame body in a first direction that is a direction in which the first frame body and the second frame body are arranged is larger than a thickness of the first metal film in the first direction.

Provided is a small-sized inexpensive semiconductor module in which increase of ON resistance and increase of turn-off surge voltage at low temperature are suppressed. The semiconductor module includes: a semiconductor switching element; and a stress application portion provided on one or each of a first surface and a second surface on an opposite side to the first surface of the semiconductor switching element, having a linear expansion coefficient larger than that of a main material of the semiconductor switching element, and having a larger thickness than the semiconductor switching element. The stress application portion generates compressive or tensile stress in the semiconductor switching element through thermal shrinkage or expansion of the stress application portion due to change in temperature. A threshold voltage at which the semiconductor switching element is turned on, decreases in association with increase of a magnitude of the compressive or tensile stress in the semiconductor switching element.

Provided is a small-sized inexpensive semiconductor module in which increase of ON resistance and increase of turn-off surge voltage at low temperature are suppressed. The semiconductor module includes: a semiconductor switching element; and a stress application portion provided on one or each of a first surface and a second surface on an opposite side to the first surface of the semiconductor switching element, having a linear expansion coefficient larger than that of a main material of the semiconductor switching element, and having a larger thickness than the semiconductor switching element. The stress application portion generates compressive or tensile stress in the semiconductor switching element through thermal shrinkage or expansion of the stress application portion due to change in temperature. A threshold voltage at which the semiconductor switching element is turned on, decreases in association with increase of a magnitude of the compressive or tensile stress in the semiconductor switching element.

A power module structure includes a first metal layer, a second metal layer, a third metal layer and a fourth metal layer, wherein the fourth metal layer is connected to the second metal layer via a connecting bridge; at least one first switch including a first end connected to the third metal layer and a second end connected to the second metal layer; and at least one second switch including a third end connected to the fourth metal layer and a fourth end connected to the first metal layer; wherein the projection of the first metal layer and the projection of the third metal layer are overlapped to form a first overlapping area; wherein the direction of the current flowing through the first metal layer is opposite to the direction of the current flowing through the third metal layer.

A power module structure includes a first metal layer, a second metal layer, a third metal layer and a fourth metal layer, wherein the fourth metal layer is connected to the second metal layer via a connecting bridge; at least one first switch including a first end connected to the third metal layer and a second end connected to the second metal layer; and at least one second switch including a third end connected to the fourth metal layer and a fourth end connected to the first metal layer; wherein the projection of the first metal layer and the projection of the third metal layer are overlapped to form a first overlapping area; wherein the direction of the current flowing through the first metal layer is opposite to the direction of the current flowing through the third metal layer.