A semiconductor package includes a PDA chip, a MOS chip, and a wiring plate including a first principal surface and a second principal surface, the first principal surface being provided with a first rigid plate that is non-conductive and a second rigid plate that is conductive, the PDA chip being fixed to the first rigid plate by using a non-conductive bonding agent, a lower surface terminal of the MOS chip being soldered to the second rigid plate, the second principal surface being provided with an input terminal and an output terminal, the input terminal being electrically connected to the PDA chip, the output terminal being electrically connected to the second rigid plate.

The subject matter of the present disclosure may be embodied in devices, such as flexible wiring, that include: an elongated flexible substrate; multiple electrically conductive traces arranged in an array on a first side of the elongated flexible substrate; and an electromagnetic shielding layer on a second side of the elongated flexible substrate, the second side being opposite the first side, in which the elongated flexible substrate includes a fold region between a first electronically conductive trace and a second electrically conductive trace such that the electromagnetic shielding layer provides electromagnetic shielding between the first electronically conductive trace and the second electrically conductive trace.

An embedded packaging structure and a manufacturing method thereof are disclosed. The method includes: providing a bearing plate with a first metal seed layer; processing on the first metal seed layer to obtain a substrate; removing the bearing plate to obtain the substrate, and processing on the substrate to obtain a first and a second cavities penetrating therethrough; assembling a first component in the first cavity, assembling a connecting flexible board in the second cavity, processing on a second side of the substrate to obtain a second insulating layer; processing on a first side of the substrate to obtain a second circuit layer, assembling a second component on the second circuit layer; bending the substrate through the connecting flexible board to form an included angle less than 180 degrees on the first side, and packaging the first side by using a packaging material to obtain a packaging layer.

A semiconductor device with redistribution layers formed utilizing dummy substrates is disclosed and may include forming a first redistribution layer on a first dummy substrate, forming a second redistribution layer on a second dummy substrate, electrically connecting a semiconductor die to the first redistribution layer, electrically connecting the first redistribution layer to the second redistribution layer, and removing the dummy substrates. The first redistribution layer may be electrically connected to the second redistribution layer utilizing a conductive pillar. An encapsulant material may be formed between the first and second redistribution layers. Side portions of one of the first and second redistribution layers may be covered with encapsulant. A surface of the semiconductor die may be in contact with the second redistribution layer. The dummy substrates may be in panel form. One of the dummy substrates may be in panel form and the other in unit form.

A method is disclosed for mounting and cooling a circuit component having aplurality of contacts. The method comprises mounting the circuit component on a rigid substrate of a thermally conductive and electrically insulating material with a circuit board arranged between the circuit component and the substrate. The circuit board, which has a flexible base and carries conductive traces that terminate in contact pads, is secured to the rigid substrate with at least some of the contact pads on the circuit board disposed on the side of the circuit board facing the rigid substrate, at least some of the latter contact pads being bonded to the substrate. To establish both an electrical and a thermal connection between the contacts of the circuit component and the contact pads bonded to the substrate, blind holes are formed in the flexible base of the circuit board, each hole terminating at a respective one of the contact pads bonded to the substrate. The side of the contact pads exposed by the holes is plated to form conductive vias that fill the holes and that are soldered to the contacts of the circuit component.

An electronic module is disclosed. The electronic module can include a package substrate, an integrated device die, a dam structure, and a mounting compound. The integrated device die can have an upper side, a lower side, and an outer side edge. The dam structure can have a first sidewall and a second sidewall opposite the first sidewall. The second sidewall can be nearer to the outer side edge than the first sidewall. The first sidewall can be laterally positioned between a center of the lower side of the integrated device die and the outer side edge. The dam structure can be disposed between a portion of the package substrate and a portion of the lower side of the integrated device die. The mounting compound can be disposed between the lower side of the integrated device die and the package substrate. The dam structure can be positioned between the mounting compound and the outer side edge of the integrated device die.

A device comprising a first package and a second package coupled to the first package through a first plurality of solder interconnects. The first package includes a first substrate comprising at least one first dielectric layer and a first plurality of interconnects, and a first integrated device coupled to the first substrate. The second package includes a second substrate comprising at least one second dielectric layer and a second plurality of interconnects, a second integrated device coupled to a first surface of the second substrate, a third integrated device coupled to the first surface of the second substrate through a second plurality of solder interconnects and a first plurality of channel interconnects coupled to the first surface of the second substrate, wherein the first plurality of channel interconnects is located between solder interconnects from the second plurality of solder interconnects.

A flexible substrate includes a first area including a first circuit, the first circuit configured to be connectable to a first component, a second area including a second circuit, the second circuit configured to be connectable to a second component, a connecting area provided between the first area and the second area and including a third circuit, the third circuit connecting the first circuit and the second circuit, one or more first via conductors provided between the first area and the connecting area and electrically isolated from the first circuit, the second circuit, and the third circuit, and one or more second via conductors provided between the second area and the connecting area and electrically isolated from the first circuit, the second circuit, and the third circuit.

A semiconductor device includes a rigid flex circuit that has a first rigid region and a second rigid region that are electrically connected by a flexible portion. A first die is mounted to a first side of the first rigid region. A second die is mounted to a second side of the second rigid region. The first and second sides are on opposite sides of the rigid flex circuit. The flexible portion is bent to hold the first and second rigid regions in generally vertical alignment with each other.

The present invention discloses a method for packaging a chip-on-film (COF). The method includes: S1, forming a plurality of first pins on a circuit surface of a flexible circuit substrate, and forming a plurality of second pins on a chip to be packaged; S2, arranging to keep the circuit surface always facing downwards, arranging to keep a surface of the chip to be packaged, where the second pins matching the first pins are arranged, always facing upwards, and arranging the first pins and the second pins, to be opposite to each other; and S3, applying a top-down pressure to the flexible circuit substrate, and/or applying a bottom-up pressure to the chip to be packaged, and simultaneously heating at high temperature to solder the first pins and the second pins in a fused eutectic manner. The method of the present invention improves the product yield and stability.