A semiconductor module is obtained in which breakage of the semiconductor module can be detected in advance while suppressing increase in manufacturing cost. A semiconductor module includes a semiconductor element, a circuit board, a resistor, a first wiring member, and a detector. The circuit board includes a circuit pattern. The resistor is connected to a surface of the circuit pattern. The first wiring member directly connects the resistor to the semiconductor element. In the first wiring member, at least part of current flowing from the semiconductor element to the circuit pattern flows. The detector is configured to detect at least one of a change of a voltage drop value in the resistor and a change of a current value in the resistor.

A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a first resistive element and a second resistive element over the semiconductor substrate. The semiconductor device structure also includes a first conductive feature electrically connected to the first resistive element and a second conductive feature electrically connected to the second resistive element. The semiconductor device structure further includes a dielectric layer surrounding the first conductive feature and the second conductive feature.

Provided is a semiconductor device capable of improving relative accuracy of semiconductor elements and a yield of a semiconductor integrated circuit device. The semiconductor device includes a flat region formed on a surface of a semiconductor substrate, and having an outer peripheral shape formed by regional sides and regional chamfer portions; an outer peripheral region surrounding the flat region, and having a uniform height different from a height of the flat region; a plurality of semiconductor elements having similar shapes or the same shape, and formed on the flat region; and a wiring metal connecting the plurality of semiconductor elements via contact holes formed in a second insulating film on the semiconductor elements.

A package includes a redistribution structure, a die package on a first side of the redistribution structure including a first die connected to a second die by metal-to-metal bonding and dielectric-to-dielectric bonding, a dielectric material over the first die and the second die and surrounding the first die, and a first through via extending through the dielectric material and connected to the first die and a first via of the redistribution structure, a semiconductor device on the first side of the redistribution structure includes a conductive connector, wherein a second via of the redistribution structure contacts the conductive connector of the semiconductor device, a first molding material on the redistribution structure and surrounding the die package and the semiconductor device, and a package through via extending through the first molding material to contact a third via of the redistribution structure.

A semiconductor module includes: a first metal plate including a first mount part joined with a bottom-surface electrode of a first switching element, a second mount part joined with a positive-electrode terminal, and a first narrow part between the first and second mount parts and being narrower than a part jointing the first switching element to the first mount part and the positive-electrode terminal; a second metal plate being joined with a bottom-surface electrode of a second switching element, and connected to a top-surface electrode of the first switching element; a third metal plate including a sixth mount part joined with a negative-electrode terminal, a seventh mount part connected to a top-surface electrode of the second switching element, and being narrower than the negative-electrode terminal, and a second narrow part between the sixth and seventh mount parts; and a snubber circuit connecting the first and second narrow parts.

A configurable capacitance device includes a semiconductor substrate including a plurality of integrally formed capacitors; and a separate interconnect structure coupled to the semiconductor substrate, wherein the separate interconnect structure is configurable to electrically couple two or more of the plurality of integrally formed capacitors together in a parallel configuration.

A semiconductor device includes: an insulated circuit substrate; a semiconductor chip provided on the insulated circuit substrate; a first external connection terminal provided on the insulated circuit substrate; a relay terminal provided on the insulated circuit substrate; a printed circuit board arranged over the semiconductor chip and connected to the first external connection terminal and the relay terminal; and a first snubber circuit provided on the printed circuit board and having one end connected to the first external connection terminal via the printed circuit board and another end connected to the relay terminal via the printed circuit board.

An integrated circuit package is disclosed. The integrated circuit package includes a first integrated circuit die, a second integrated circuit die, an organic substrate, wherein both the first integrated circuit die and the second integrated circuit die are connected to the organic substrate, a multi-die interconnect bridge (EMIB) embedded within the organic substrate, and a termination resistor associated with a circuit in the first integrated circuit die, wherein the termination resistor is located within the multi-die interconnect bridge embedded within the organic substrate.

Lands (11c and 11d) are parts of base plates (104c and 104d), and electrodes of a shunt resistor (103U) are put on and connected to the lands (11c and 11d). Slits (130 and 131) are formed in the lands (11c and 11d) to separate a main electric circuit in which a main current flows and control terminals (123 and 124) with which the electric potentials of the electrodes of the shunt resistor (103U) are detected. Leading end portions of the slits (130 and 131) extend to the vicinity of the electrodes of the shunt resistor (103U).

A packaged radio frequency (RF) amplifier device includes a flange and a transistor die mounted to the flange. The transistor die includes an output terminal. The packaged RF amplifier device includes a first bond wire array including a first plurality of bond wires. Each bond wire in the first plurality of bond wires is electrically coupled to the output terminal of the transistor die. A first ground loop area of a first bond wire in the first plurality of bond wires is greater than a second ground loop area of a second bond wire in the first plurality of bond wires.