A method, in some embodiments, comprises: providing a component having first and second electrical nodes; determining that the component lacks multiple, functional electrical couplings between said first and second nodes; damaging at least part of the component as a result of said determination; and determining, as a result of said damage, that the component is defective.

The power semiconductor apparatus includes: a semiconductor device 401; a bonding layer on chip 416 disposed on an upper surface of the semiconductor device; and a metal lead 419 disposed on the upper surface of the semiconductor device and bonded to the bonding layer on chip, wherein the metal lead 420 has a three-laminated structure including: a second metal layer 420b having a CTE equal to or less than 510.sup.6/ C., for example; and a first metal layer 420a and a third metal layer 420c sandwiching the second metal layer and having a CTE equal to or greater than the CTE of the second metal layer. Provided is a power semiconductor apparatus capable of improving reliability thereof by reducing a thermal stress to a bonding layer between a semiconductor power device and a metal lead positioned on an upper surface thereof, and reducing a resistance of the metal lead.

An object is to provide a semiconductor device which suppresses poor bonding between a metal pattern and an electrode terminal due to insufficient temperature rise at the time of bonding the metal pattern and the electrode terminal. The electrode terminal is branched into a plurality of branch portions in a width direction on one end side of an extending direction thereof, of the plurality of branch portions, a first branch portion and a second branch portion are bonded on the metal pattern via a bonding material, respectively, the first branch portion has a wider width than that of the second branch portion, and the bonding material between the second branch portion and the metal pattern is thinner than the bonding material between the first branch portion and the metal pattern.

A semiconductor device manufacturing method includes a first preparation step, a second preparation step, a mounting step, a third preparation step, a placing step and a curing step. In the first preparation step, a first leadframe including an island part is prepared. In the second preparation step, a semiconductor element including an element obverse surface, an element reverse surface, a first electrode and a second electrode is prepared. In the mounting step, the semiconductor element is mounted on the island part with a first conductive paste interposed between the element reverse surface and the island part. In the third preparation step, a second leadframe including a first part, a second part, a frame part, a first connecting part and a second connecting part is prepared. In the placing step, the second leadframe is placed with a second conductive paste interposed between the first part and the first electrode and with a third conductive paste interposed between the second part and the second electrode. In the curing step, the first conductive paste, the second conductive paste and the third conductive paste are hardened.

A semiconductor chip (2a) is bonded to an upper surface of the conductive substrate (1a). A control terminal (11a) is disposed outside the semiconductor chip (2a) and connected to a control electrode of the semiconductor chip (2a) via a lead (12a). A case (10) surrounds the semiconductor chip (2a). A sealing material (13) seals the semiconductor chip (2a). The lead frame (4) includes a bonded part (4a) joined to the semiconductor chip (2a), and an upright part (4b) embedded in the case (10), extending from the bonded part (4a) to an outer side of the control terminal (11a), and standing upright vertically relative to an upper surface of the semiconductor chip (2a).

A semiconductor die is arranged at a die mounting location of an electrically conductive substrate. The electrically conductive substrate includes an array of electrically conductive leads having openings at the periphery of the electrically conductive substrate. An electrically conductive clip is arranged in a bridge-like position between the semiconductor die and an electrically conductive lead in the array of electrically conductive leads to provide electrical coupling therebetween. The electrically conductive clip has an end coupled to the electrically conductive lead, wherein the end includes: a planar proximal portion configured to contact the electrically conductive lead proximally of the openings, and a distal portion projecting beyond the proximal portion distally thereof, the distal portion provided with sculpturing configured to engage the openings to facilitate immobilizing the electrically conductive clip in the bridge-like position between the semiconductor chip and electrically conductive lead.

A semiconductor device includes a semiconductor element having a front electrode, an electrode plate having an area larger than the front electrode of the semiconductor element in a two-dimensional view and made of aluminum or aluminum alloy, and a metal member having a joint surface joined to the front electrode of the semiconductor element with solder, having an area smaller than the front electrode of the semiconductor element in a two-dimensional view, made of a metal different from the electrode plate, and fastened to the electrode plate to electrically connect the front electrode of the semiconductor element to the electrode plate.

A method includes providing a substrate having substrate terminals and providing a first component having a first terminal and a second terminal. The method includes providing a clip structure having a first clip, a second clip, and a clip connector coupling the first clip to the second clip. The method includes coupling the first clip to the first terminal and a substrate terminal and coupling the second clip to another substrate terminal. The method includes encapsulating the structure and removing a portion of the clip connector. In some examples, the first portion of the clip connector includes a first portion surface, the second portion of the clip connector includes a second portion surface, and the first portion surface and the second portion surface are exposed from a top side of the encapsulant. Other examples and related structures are also disclosed herein.

According to one embodiment, a semiconductor device includes a semiconductor chip, first and second conductive members, a first connection member, and a resin portion. The first conductive member includes first and second portions. The second portion is electrically connected to the semiconductor chip. A direction from the semiconductor chip toward the second portion is aligned with a first direction. A direction from the second portion toward the first portion is aligned with a second direction crossing the first direction. The second conductive member includes a third portion. The first connection member is provided between the first and third portion. The first connection member is conductive. The resin portion includes a first partial region. The first partial region is provided around the first and third portions, and the first connection member. The first portion has a first surface opposing the first connection member and including a recess and a protrusion.

A connection member for connecting an electronic chip, wherein the connection member comprises a bulk body, and a coating at least partially coating the bulk body and comprising a material having higher electric and higher thermal conductivity than the bulk body, wherein a ratio between a thickness of the coating and a thickness of the bulk body is at least 0.0016 at at least a part of the connection member.