Multiple bonded units are provided, each of which includes a respective front-side die and a backside die. The two dies in each bonded unit may be a memory die and a logic die configured to control operation of memory elements in the memory die. Alternatively, the two dies may be memory dies. The multiple bonded units can be attached such that front-side external bonding pads have physically exposed surfaces that face upward and backside external bonding pads of each bonded unit have physically exposed surfaces that face downward. A first set of bonding wires can connect a respective pair of front-side external bonding pads, and a second set of bonding wires can connect a respective pair of backside external bonding pads.

A semiconductor device includes: a chip unit, a conductive wire unit, and a cover unit. The chip unit includes a substrate formed with an interconnect structure, and a semiconductor chip disposed on the substrate. The conductive wire unit includes a conductive wire that interconnects the semiconductor chip and the interconnect structure. The cover unit includes a cover member that covers the conductive wire. The cover member includes an insulating layer formed by atomic layer deposition. A method for making the semiconductor device is also disclosed.

In a described example, an apparatus includes: a process chamber configured for a pressure greater than one atmosphere, having a device chuck configured to support electronic devices that are mounted on package substrates and partially covered in mold compound, the electronic devices spaced from one another by saw streets; and a saw in the process chamber configured to cut through the mold compound and package substrates in the saw streets to separate the molded electronic devices one from another.

Provided is a Pd coated Cu bonding wire for a semiconductor device capable of sufficiently obtaining bonding reliability of a ball bonded portion in a high temperature environment of 175° C. or more, even when the content of sulfur in the mold resin used in the semiconductor device package increases. The bonding wire for a semiconductor device comprises a Cu alloy core material; and a Pd coating layer formed on a surface of the Cu alloy core material; and contains 0.03 to 2% by mass in total of one or more elements selected from Ni, Rh, Ir and Pd in the bonding wire and further 0.002 to 3% by mass in total of one or more elements selected from Li, Sb, Fe, Cr, Co, Zn, Ca, Mg, Pt, Sc and Y. The bonding wire can be sufficiently obtained bonding reliability of a ball bonded portion in a high temperature environment of 175° C. or more, even when the content of sulfur in the mold resin used in the semiconductor device package increases by being used.

A semiconductor and a method of fabricating the semiconductor having multiple, interconnected die including: providing a semiconductor substrate having a plurality of disparate die formed within the semiconductor substrate, and a plurality of scribe lines formed between pairs of adjacent die of the plurality of disparate die; and fabricating, by a lithography system, a plurality of inter-die connections that extend between adjacent pair of die of the plurality of die.

An electro-optical package. In some embodiments, the package includes: a carrier; a first integrated circuit, on the carrier; a first bonding layer, between the carrier and the first integrated circuit; a thermoelectric cooler, on the carrier; a second integrated circuit, on the thermoelectric cooler; and a first wire bond. The first wire bond may connect a first pad, on the first integrated circuit, to a second pad, on the second integrated circuit, the first pad and the second pad having a height difference less than 100 microns.

A microelectronic package includes a substrate having a first surface. A microelectronic element overlies the first surface. Electrically conductive elements are exposed at the first surface of the substrate, at least some of which are electrically connected to the microelectronic element. The package includes wire bonds having bases bonded to respective ones of the conductive elements and ends remote from the substrate and remote from the bases. The ends of the wire bonds are defined on tips of the wire bonds, and the wire bonds define respective first diameters between the bases and the tips thereof. The tips have at least one dimension that is smaller than the respective first diameters of the wire bonds. A dielectric encapsulation layer covers portions of the wire bonds, and unencapsulated portions of the wire bonds are defined by portions of the wire bonds, including the ends, are uncovered by the encapsulation layer.

An offset interposer includes a land side including land-side ball-grid array (BGA) and a package-on-package (POP) side including a POP-side BGA. The land-side BGA includes two adjacent, spaced-apart land-side pads, and the POP-side BGA includes two adjacent, spaced-apart POP-side pads that are coupled to the respective two land-side BGA pads through the offset interposer. The land-side BGA is configured to interface with a first-level interconnect. The POP-side BGA is configured to interface with a POP substrate. Each of the two land-side pads has a different footprint than the respective two POP-side pads.

There is provided an Al bonding wire which can provide a sufficient bonding reliability of bonded parts of the bonding wire under a high temperature state where a semiconductor device using the Al bonding wire is operated. The bonding wire is composed of Al or Al alloy, and is characterized in that an average crystal grain size in a cross-section of a core wire in a direction perpendicular to a wire axis of the bonding wire is 0.01 to 50 μm, and when measuring crystal orientations on the cross-section of the core wire in the direction perpendicular to the wire axis of the bonding wire, a crystal orientation <111> angled at 15 degrees or less to a wire longitudinal direction has a proportion of 30 to 90% among crystal orientations in the wire longitudinal direction.

There is provided a metal-coated Al bonding wire which can provide a sufficient bonding reliability of bonded parts of the bonding wire under a high temperature state where a semiconductor device using the metal-coated Al bonding wire is operated. The bonding wire includes a core wire of Al or Al alloy, and a coating layer of Ag, Au or an alloy containing them formed on the outer periphery of the core wire, and the bonding wire is characterized in that when measuring crystal orientations on a cross-section of the core wire in a direction perpendicular to a wire axis of the bonding wire, a crystal orientation <111> angled at 15 degrees or less to a wire longitudinal direction has a proportion of 30 to 90% among crystal orientations in the wire longitudinal direction. Preferably, the surface roughness of the wire is 2 μm or less in terms of Rz.