Patent classifications
H01L25/11
Apparatuses and related methods for staggering power-up of a stack of semiconductor dies
An apparatus including semiconductor dies in a stack. The semiconductor dies are configured to power-up in a staggered manner. Methods for powering up an electronic device include detecting a power-up event with the semiconductor dies in the stack, and responsive to the power-up event, powering up a first semiconductor die in the stack at a first time, and powering up a second semiconductor die in the stack at a second time that is different from the first time.
Power module
A power converter module includes a ground terminal, an input voltage terminal confirmed to receive a raw input voltage, and an interconnection terminal configured to provide a regulated output voltage to a load such as a SOC or SIP system to be powered. A voltage regulator is connected to the ground terminal and the input voltage terminal. An inductor has an inductor output connected to the interconnection terminal.
ELECTRICAL MODULE CONTAINING AN ELECTRICAL COMPONENT AND A CONVERTER CONTAINING THE ELECTRICAL MODULE
An electrical module contains at least one electrical component which is accommodated in a module housing. The module housing has at least two housing parts which lie one on the other and, on their own or together with one or more further housing parts of the module housing, delimit the interior of the module housing. There is at least one adhesive layer between the two housing parts, the adhesive layer adhesively bonding the two housing parts to one another.
Semiconductor power modules and devices
An electronic component is described which includes a first transistor encased in a first package, the first transistor being mounted over a first conductive portion of the first package, and a second transistor encased in a second package, the second transistor being mounted over a second conductive portion of the second package. The component further includes a substrate comprising an insulating layer between a first metal layer and a second metal layer. The first package is on one side of the substrate with the first conductive portion being electrically connected to the first metal layer, and the second package is on another side of the substrate with the second conductive portion being electrically connected to the second metal layer. The first package is opposite the second package, with at least 50% of a first area of the first conductive portion being opposite a second area of the second conductive portion.
Method for manufacturing semiconductor module and intermediate assembly unit of the same
A method for manufacturing a semiconductor module includes the step of soldering two or more semiconductor elements having substrate materials and heights different from each other to a metal foil disposed at one side of an insulating substrate; connecting a plurality of wiring members, not interconnecting the semiconductor elements, to front face electrodes of the semiconductor elements through solder so that heights from a surface of the insulating substrate to top faces of the wiring members become same level with each other; inspecting a leakage current while applying electricity on each one of semiconductor elements individually through the wiring members; and connecting the top faces of the wiring members with a bus bar.
POWER MODULE AND FABRICATION METHOD OF THE SAME, GRAPHITE PLATE, AND POWER SUPPLY EQUIPMENT
A power module (PM) includes: an insulating substrate; a semiconductor device disposed on the insulating substrate, the semiconductor device including electrodes on a front surface side and a back surface side thereof; and a graphite plate having an anisotropic thermal conductivity, the graphite plate of which one end is connected to the front surface side of the semiconductor device and the other end is connected to the insulating substrate, wherein heat of the front surface side of the semiconductor device is transferred to the insulating substrate through the graphite plate. There is provide an inexpensive power module capable of reducing a stress and capable of exhibiting cooling performance not inferior to that of the double-sided cooling structures.
Microelectronic device with embedded die substrate on interposer
Microelectronic devices with an embedded die substrate on an interposer are described. For example, a microelectronic device includes a substrate housing an embedded die. At least one surface die is retained above a first outermost surface of the substrate. An interposer is retained proximate a second outermost surface of the substrate.
Analysis system, analysis method, and program storage medium
In order to provide a feature for processing an image of an object being photographed using photographic data having better quality, an image analyzer 1 is provided with a selection unit 104 and a bandwidth control request unit 105. The selection unit 104 selects a second photographing device associated with a first photographing device from among a plurality of photographing devices. The bandwidth control request unit 105 transmits, to a network control device, a request for change of the transmission data amount transmittable by the second photographing device.
Analysis system, analysis method, and program storage medium
In order to provide a feature for processing an image of an object being photographed using photographic data having better quality, an image analyzer 1 is provided with a selection unit 104 and a bandwidth control request unit 105. The selection unit 104 selects a second photographing device associated with a first photographing device from among a plurality of photographing devices. The bandwidth control request unit 105 transmits, to a network control device, a request for change of the transmission data amount transmittable by the second photographing device.
Heterogeneous miniaturization platform
A method of forming an electrical device is provided that includes forming microprocessor devices on a microprocessor die; forming memory devices on an memory device die; forming component devices on a component die; and forming a plurality of packing devices on a packaging die. Transferring a plurality of each of said microprocessor devices, memory devices, component devices and packaging components to a supporting substrate, wherein the packaging components electrically interconnect the memory devices, component devices and microprocessor devices in individualized groups. Sectioning the supporting substrate to provide said individualized groups of memory devices, component devices and microprocessor devices that are interconnected by a packaging component.