Patent classifications
H01L29/45
SEMICONDUCTOR STRUCTURE WITH BACKSIDE THROUGH SILICON VIAS AND METHOD OF OBTAINING DIE IDS THEREOF
A semiconductor structure with backside through silicon vias (TSVs) is provided in the present invention, including a semiconductor substrate with a front side and a back side, multiple dummy pads set on the front side, multiple backside TSVs extending from the back side to the front side, wherein a number of the dummy pads are connected with the backside TSVs while other dummy pads are not connected with the backside TSVs, and a metal coating covering the back side and the surface of backside TSVs and connected with those dummy pads that connecting with the backside TSVs.
METHOD OF FORMING CONTACT STRUCTURE, METHOD OF FABRICATING SEMICONDUCTOR DEVICE, CONTACT STRUCTURE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME
Disclosed are a method of forming a contact structure, a method of fabricating a semiconductor device, a contact structure, and a semiconductor device including the same. A method of forming a contact structure may comprise forming a porous silicon layer on a substrate by using an epitaxy process, forming a dielectric layer on the porous silicon layer, forming a metal layer on the dielectric layer, forming a silicide member having a three-dimensional structure in the porous silicon layer by diffusing metal atoms of the metal layer into the porous silicon layer through the dielectric layer and reacting the diffused metal atoms with the porous silicon layer in a heat treatment process, removing the metal layer and the dielectric layer, and forming a conductive layer in contact with the silicide member.
METHOD OF FORMING CONTACT STRUCTURE, METHOD OF FABRICATING SEMICONDUCTOR DEVICE, CONTACT STRUCTURE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME
Disclosed are a method of forming a contact structure, a method of fabricating a semiconductor device, a contact structure, and a semiconductor device including the same. A method of forming a contact structure may comprise forming a porous silicon layer on a substrate by using an epitaxy process, forming a dielectric layer on the porous silicon layer, forming a metal layer on the dielectric layer, forming a silicide member having a three-dimensional structure in the porous silicon layer by diffusing metal atoms of the metal layer into the porous silicon layer through the dielectric layer and reacting the diffused metal atoms with the porous silicon layer in a heat treatment process, removing the metal layer and the dielectric layer, and forming a conductive layer in contact with the silicide member.
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
The present disclosure provides a semiconductor structure and a manufacturing method thereof, and relates to the technical field of semiconductors. The semiconductor structure includes: a base, including a doped region; a recess, located in the doped region; and a gradient layer, filling the recess, wherein a doping concentration of the gradient layer varies gradually from a bottom of the recess upwards.
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
The present disclosure provides a semiconductor structure and a manufacturing method thereof, and relates to the technical field of semiconductors. The semiconductor structure includes: a base, including a doped region; a recess, located in the doped region; and a gradient layer, filling the recess, wherein a doping concentration of the gradient layer varies gradually from a bottom of the recess upwards.
Thin film transistor and method for manufacturing the same, array substrate, display panel, and display device
Embodiments of the present disclosure provide a thin film transistor, a method for manufacturing a thin film transistor, an array substrate, a display panel, and a display device. The thin film transistor includes: a base substrate; an active layer, an insulating layer, and a source-drain layer sequentially stacked on the base substrate, wherein the source-drain layer is electrically connected to the active layer through a via hole penetrating the insulating layer; and a transition layer arranged between the source-drain layer and the active layer at a position of the via hole, wherein the transition layer covers a bottom of the via hole and covers at least part of a sidewall of the via hole, and the transition layer comprises elements of the active layer and elements of a part of the source-drain layer, the part of the source-drain layer being in contact with the transition layer.
Semiconductor device and method for manufacturing the same
A semiconductor device having a reduced amount of oxygen vacancy in a channel formation region of an oxide semiconductor is provided. Further, a semiconductor device which includes an oxide semiconductor and has improved electric characteristics is provided. Furthermore, a methods for manufacturing the semiconductor device is provided. An oxide semiconductor film is formed; a conductive film is formed over the oxide semiconductor film at the same time as forming a low-resistance region between the oxide semiconductor film and the conductive film; the conductive film is processed to form a source electrode and a drain electrode; and oxygen is added to the low-resistance region between the source electrode and the drain electrode, so that a channel formation region having a higher resistance than the low-resistance region is formed and a first low-resistance region and a second low-resistance region between which the channel formation region is positioned are formed.
Semiconductor device and method for manufacturing the same
A semiconductor device having a reduced amount of oxygen vacancy in a channel formation region of an oxide semiconductor is provided. Further, a semiconductor device which includes an oxide semiconductor and has improved electric characteristics is provided. Furthermore, a methods for manufacturing the semiconductor device is provided. An oxide semiconductor film is formed; a conductive film is formed over the oxide semiconductor film at the same time as forming a low-resistance region between the oxide semiconductor film and the conductive film; the conductive film is processed to form a source electrode and a drain electrode; and oxygen is added to the low-resistance region between the source electrode and the drain electrode, so that a channel formation region having a higher resistance than the low-resistance region is formed and a first low-resistance region and a second low-resistance region between which the channel formation region is positioned are formed.
Semiconductor device, display device, and method for manufacturing semiconductor device
A semiconductor device with favorable electrical characteristics, a semiconductor device with stable electrical characteristics, or a highly reliable semiconductor device or display device is provided. A first insulating layer and a first conductive layer are stacked over a first region of a first metal oxide layer. A first layer is formed in contact with a second metal oxide layer and a second region of the first metal oxide layer that is not overlapped by the first insulating layer. Heat treatment is performed to lower the resistance of the second region and the second metal oxide layer. A second insulating layer is formed. A second conductive layer electrically connected to the second region is formed over the second insulating layer. Here, the first layer is formed to contain at least one of aluminum, titanium, tantalum, and tungsten.
Panel, electronic device and transistor
A panel comprises a substrate; a transistor disposed on the substrate and including: a source electrode, a drain electrode, a gate electrode, a gate insulation layer, an active layer, an auxiliary source electrode configured to electrically connect one end of the active layer to the source electrode, and an auxiliary drain electrode configured to electrically connect an other end of the active layer to the drain electrode; and a capacitor disposed on the substrate and including a first plate and a second plate. The first plate of the capacitor is made of a same material as the auxiliary source electrode and the auxiliary drain electrode.