The present disclosure relates to an image sensor. The image sensor includes a substrate and a photodetector in the substrate. The image sensor further includes an absorption enhancement structure. The absorption enhancement structure is defined by a substrate depression along a first side of the substrate. The substrate depression is defined by a first plurality of sidewalls that slope toward a first common point and by a second plurality of sidewalls that slope toward a second common point. The first plurality of sidewalls extend over the second plurality of sidewalls.

Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a solar cell can include a substrate having a light-receiving surface and a back surface. A first doped region of a first conductivity type, wherein the first doped region is disposed in a first portion of the back surface. A first thin dielectric layer disposed over the back surface of the substrate, where a portion of the first thin dielectric layer is disposed over the first doped region of the first conductivity type. A first semiconductor layer disposed over the first thin dielectric layer. A second doped region of a second conductivity type in the first semiconductor layer, where the second doped region is disposed over a second portion of the back surface. A first conductive contact disposed over the first doped region and a second conductive contact disposed over the second doped region.

A pyramid structure to mitigate optical probing attacks in ICs by scrambling the measurements reflected by a laser pulse is disclosed. The pyramid structure is applied to selected areas at the bottom surface of the metal traces in metal layer to circumvent the extra silicon layer and thus minimize the changes to the conventional device structures. The pyramid structure includes randomized pyramids at nanometer scale. Optical simulation results show the pyramidized metal surface is able to prevent optical probing attacks. The fabrication of pyramids is CMOS compatible as well. Optical simulations are performed to analyze the impact these nano-scaled pyramids in a laser voltage probing attacking model. The nanopyramid can disturb the optical measurements enough to make the attacks practically infeasible. In addition, the nanopyramid structure countermeasure works in a passive mode without consuming any energy.

Microstructures of micro and/or nano holes on one or more surfaces enhance photodetector optical sensitivity. Arrangements such as a CMOS Image Sensor (CIS) as an imaging LIDAR using a high speed photodetector array wafer of Si, Ge, a Ge alloy on SI and/or Si on Ge on Si, and a wafer of CMOS Logic Processor (CLP) ib Si fi signal amplification, processing and/or transmission can be stacked for electrical interaction. The wafers can be fabricated separately and then stacked or can be regions of the same monolithic chip. The image can be a time-of-flight image. Bayer arrays can be enhanced with microstructure holes. Pixels can be photodiodes, avalanche photodiodes, single photon avalanche photodiodes and phototransistors on the same array and can be Ge or Si pixels. The array can be of high speed photodetectors with data rates of 56 Gigabits per second, Gbps, or more per photodetector.

Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region. A second conductive contact structure is disposed on the second polycrystalline silicon emitter region.

A photodetector including a plurality of photoelectric conversion sections that is provided to a semiconductor substrate. The photoelectric conversion sections each include a first region of a first electrical conduction type that is provided on a first surface side of the semiconductor substrate, a second region of a second electrical conduction type that is provided on a second surface side of the semiconductor substrate opposite to the first surface, a third region of a third electrical conduction type that is provided in a region between the first region and the second region of the semiconductor substrate, a first electrode that is electrically coupled to the first region from the first surface side, and a second electrode that is electrically coupled to the second region from the second surface side. The third region absorbs incident light.

The instant disclosure provides an optical component packaging structure which includes a far-infrared sensor chip, a first metal layer, a packaging housing and a covering member. The far-infrared sensor chip includes a semiconductor substrate and a semiconductor stack structure. The semiconductor substrate has a first surface, a second surface which is opposite to the first surface, and a cavity. The semiconductor stack structure is disposed on the first surface of the semiconductor substrate, and a part of the semiconductor stack structure is located above the cavity. The first metal layer is disposed on the second surface of the semiconductor substrate, the packaging housing is used to encapsulate the far-infrared sensor chip and expose at least a part of the far-infrared sensor chip, and the covering member is disposed above the semiconductor stack structure.

A tandem solar cell includes a perovskite solar cell including a perovskite absorption layer, a silicon solar cell placed under the perovskite solar cell, a junction layer placed between the perovskite solar cell and the silicon solar cell, an upper electrode placed on the perovskite solar cell, and a lower electrode placed under the silicon solar cell.

An imaging device may include single-photon avalanche diodes (SPADs). To improve the sensitivity and signal-to-noise ratio of the SPADs, light scattering structures may be formed in the semiconductor substrate to increase the path length of incident light through the semiconductor substrate. To mitigate crosstalk, an isolation structure may be formed in a ring around the SPAD. The isolation structure may be a hybrid isolation structure with both a metal filler that absorbs light and a low-index filler that reflects light. The isolation structure may be formed as a single trench or may include a backside deep trench isolation portion and a front side deep trench isolation portion. The isolation structure may also include a color filtering material.

The disclosure provides a passivated contact structure and a solar cell including the same, a cell assembly and a photovoltaic system. The passivated contact structure includes a first passivated contact region on a silicon substrate and a second passivated contact region on the first passivated contact region. The second passivated contact region has an opening connecting a conductive layer to the first passivated contact region. The first passivated contact region includes a first doped layer, a first passivation layer and a second doped layer. The second passivated contact region includes a second passivation layer and a third doped layer. The first passivation layer is a porous structure inlaid with the first doped layer and/or the second doped layer in a hole region. Utilizing the passivated contact structure provided in this invention, mitigates the serious recombination caused by metal directly contacting with silicon substrate.