H01L31/035236

Epitaxial wafer and method for manufacturing same

An epitaxial wafer which allows manufacture of a photodiode having suppressed dark current and ensured sensitivity, and a method for manufacturing the epitaxial wafer, are provided. The epitaxial wafer of the present invention includes: a III-V semiconductor substrate; and a multiple quantum well structure disposed on the substrate, and including a plurality of pairs of a first layer and a second layer. The total concentration of elements contained as impurities in the multiple quantum well structure is less than or equal to 5×10.sup.15 cm.sup.−3.

SEMICONDUCTOR PHOTO-RECEIVING DEVICE
20170271544 · 2017-09-21 · ·

According to one embodiment, a semiconductor photo-receiving device includes a substrate, a light propagation layer and a semiconductor layer including a lowest layer and upper layers. The upper layers include an optical absorption layer. The light propagation layer includes a first light input layer, a first annular layer at a desired distance from the first light input layer, and a first optical waveguide connecting the first light input layer and annular layer. The lowest layer of the semiconductor layer includes a second light input layer, a second annular layer at a desired distance from the second light input layer, and a second optical waveguide connecting the second light input layer and annular layer.

Infrared detection element

This infrared detection element includes a buffer layer (InAsSb layer) 3, a buffer layer (InAs layer) 4, and a light absorption layer (InAsSb layer) 5. A critical film thickness hc of the InAs layer satisfies a relation of hc<t with a thickness t of the InAs layer. In this case, it is possible to improve crystallinities of the buffer layer 4 of InAs and the light absorption layer 5 of InAsSb formed on the buffer layer 3.

Quantum dot channel (QDC) quantum dot gate transistors, memories and other devices
11251270 · 2022-02-15 ·

This invention includes multiple quantum well and quantum dot channel FETs, which can process multi-state/multi-bit logic, and multibit-bit inverters configured as static random-access memories (SRAMs). SRAMs can be implemented as flip-flops and registers. In addition, multiple quantum well and quantum dot channel structures are configured to function as multi-bit high-speed quantum dot (QD) random access memories (NVRAMs). Multi-bit Logic, SRAMs and QD-NVRAMs are spatially located on a chip, depending on the application, to provide a low-power consumption and high-speed hardware platform. The multi-bit logic, SRAM and register, and QD-NVRAM are implemented on a single chip in a CMOS-like platform for applications including artificial intelligence (AI) and machine learning.

Photodetector structures formed on high-index substrates

A layered structure used for detecting incident light includes a substrate having a surface with a high Miller index crystal orientation and a superlattice structure formed over the substrate at the surface. The superlattice structure is aligned to the high Miller index crystal orientation and exhibits a red-shifted long wave infrared response range based on the crystal orientation as compared to a superlattice structure formed over a substrate at a surface with a (100) crystal orientation.

Reduced volume dual-band MWIR detector

An infrared photo-detector array and a method for manufacturing it are disclosed. The infrared photo-detector array contains a plurality of pyramid-shaped structures, a first light-absorbing material supporting the plurality of the pyramid-shaped structure, a carrier-selective electronic barrier supporting the first light-absorbing material, a second light-absorbing material supporting the carrier-selective electronic barrier, and a metal reflector supporting the second light-absorbing material, wherein the plurality of the pyramid shaped structures are disposed on the side of the photo-detector array facing the incident light to be detected and the metal reflector is disposed on the opposite side of the photo-detector array. The method disclosed teaches how to manufacture the infrared photo-detector array.

Optoelectronic semiconductor chip and method for fabrication thereof

An optoelectronic semiconductor chip has a first semiconductor layer sequence which comprises a multiplicity of microdiodes, and a second semiconductor layer sequence which comprises an active region. The first semiconductor layer sequence and the second semiconductor layer sequence are based on a nitride compound semiconductor material, the first semiconductor layer sequence is before the first semiconductor layer sequence in the direction of growth, and the microdiodes form an ESD protection for the active region.

FABRICATING A SEMICONDUCTOR STRUCTURE WITH MULTIPLE QUANTUM WELLS

A method of fabricating a semiconductor structure with multiple quantum wells, comprising: providing a substrate comprising a binary semiconductor compound having a first lattice constant; depositing: a first layer on the substrate, the first layer of a first semiconductor alloy, and a second layer in contact with the first layer, the second layer of a second semiconductor alloy, to form a first stack of substantially planar semiconductor layers on the substrate; depositing in contact with the first stack a third layer of a binary semiconductor compound having the first lattice constant; depositing at least: a fourth layer on the third layer, the fourth layer comprising a third semiconductor alloy comprising InP, and a fifth layer in contact with the fourth layer, the fifth layer comprising a fourth semiconductor alloy comprising InP, to form a second stack of substantially planar semiconductor layers on the third layer.

SUPERLATTICE PHOTO DETECTOR
20210408306 · 2021-12-30 ·

A photo detector includes a superlattice with an undoped first semiconductor layer including undoped intrinsic semiconductor material, a doped second semiconductor layer having a first conductivity type on the first semiconductor layer, an undoped third semiconductor layer including undoped intrinsic semiconductor material on the second semiconductor layer, and a fourth semiconductor layer having a second opposite conductivity type on the third semiconductor layer, along with a first contact having the first conductivity type in the first, second, third, and fourth semiconductor layers, and a second contact having the second conductivity type and spaced apart from the first contact in the first, second, third, and fourth semiconductor layers. An optical shield on a second shielded portion of a top surface of the fourth semiconductor layer establishes electron and hole lakes. A packaging structure includes an opening that allows light to enter an exposed first portion of the top surface of the fourth semiconductor layer.

Multijunction solar cells with graded buffer Bragg reflectors

Distributed Bragg reflectors are incorporated into the compositionally graded buffers of metamorphic solar cells, adding functionality to the buffer without adding cost. The reflection aids in collection in subcells that are optically thin due to low diffusion length, high bulk recombination, radiation hardness, partially-absorbing quantum structures, or simply for cost savings. Performance enhancements are demonstrated in GaAs subcells with QWs, which is beneficial when GaAs is not the ideal bandgap.