The present disclosure provides a photoelectric sensor and driving method thereof, as well as an array substrate and a display device. The photoelectric sensor comprises a photoelectric element having an output terminal and a reference level input terminal, an amplifying transistor, a readout transistor, a reset transistor, a capacitor and a plurality of control input terminals. The output terminal of the photoelectric element, the gate of the amplifying transistor and the source of the reset transistor are connected to a first terminal of the capacitor. The reference level input terminal, the sources of the readout transistor and amplifying transistor are connected to a first reference voltage input terminal. The drains of the reset transistor and amplifying transistor are connected to a second reference voltage input terminal. The gates of the read-out transistor and reset transistor are respectively connected to a control input terminal.

A method of forming a semiconductor material of a photovoltaic device that includes providing a surface of a hydrogenated amorphous silicon containing material, and annealing the hydrogenated amorphous silicon containing material in a deuterium containing atmosphere. Deuterium from the deuterium-containing atmosphere is introduced to the lattice of the hydrogenated amorphous silicon containing material through the surface of the hydrogenated amorphous silicon containing material. In some embodiments, the deuterium that is introduced to the lattice of the hydrogenated amorphous silicon containing material increases the stability of the hydrogenated amorphous silicon containing material.

Various embodiments of a compensated photonic device structure and fabrication method thereof are described herein. A photonic device may include a silicon-on-insulator (SOI) substrate with a buried oxide (BOX) layer therein, a Si waveguide and an n-type contact layer formed on the BOX layer, a Si multiplication layer disposed on the n-type contact layer, a p-type Si charge layer disposed on the Si multiplication layer, a germanium (Ge) absorption layer disposed on the p-type Si charge layer, a p-type contact layer disposed on the Ge absorption layer, and a metal layer disposed on the p-type contact layer. A compensated region may be formed between the p-type Si charge layer and the Ge absorption layer with a portion of the compensated region in the p-type Si charge layer and another portion of the compensated region in the Ge absorption layer.

A process is provided for contacting a nanostructured surface. The process may include (a) providing a substrate having a nanostructured material on a surface, (b) passivating the surface on which the nanostructured material is located, (c) screen printing onto the nanostructured surface and (d) firing the screen printing ink at a high temperature. In some embodiments, the nanostructured material compromises silicon. In some embodiments, the nanostructured material includes silicon nanowires. In some embodiments, the nanowires are around 150 nm, 250 nm, or 400 nm in length. In some embodiments, the nanowires have a diameter range between about 30 nm and about 200 nm. In some embodiments, the nanowires are tapered such that the base is larger than the tip. In some embodiments, the nanowires are tapered at an angle of about 1 degree, about 3 degrees, or about 10 degrees. In some embodiments, a high temperature can be approximately 700 C, 750 C, 800 C, or 850 C.

Methods of fabricating emitter regions of solar cells are described. Methods of forming layers on substrates of solar cells, and the resulting solar cells, are also described.

Methods of fabricating emitter regions of solar cells are described. Methods of forming layers on substrates of solar cells, and the resulting solar cells, are also described.

A photoelectric conversion element includes an intrinsic layer that is disposed on a semiconductor of a first conductivity type and contains hydrogenated amorphous silicon; and a first-conductivity-type layer containing hydrogenated amorphous silicon of the first conductivity type, a second-conductivity-type layer containing hydrogenated amorphous silicon of a second conductivity type, and an insulating layer, each of which covers a part of the intrinsic layer. A first electrode is disposed on the first-conductivity-type layer with the second-conductivity-type layer therebetween. At least a part of the first electrode is located above a region where the first-conductivity-type layer contacts the intrinsic layer, and at least a part of the second electrode is located above a region where the second-conductivity-type layer contacts the intrinsic layer.

A solar cell is provided with: an n-type single crystal silicon substrate; an n-type amorphous silicon layer disposed on a first main surface of the n-type single crystal silicon substrate; a light receiving surface electrode disposed on the n-type amorphous silicon layer; a p-type amorphous silicon layer disposed on a second main surface of the n-type single crystal silicon substrate; and a rear surface electrode disposed on the p-type amorphous silicon layer. The n-type single crystal silicon substrate has a resistivity within a range of 3.5-13 Ωcm. An i-type amorphous silicon layer may be provided between the n-type single crystal silicon substrate and the n-type amorphous silicon layer, and another i-type amorphous silicon layer may be provided between the n-type single crystal silicon substrate and the p-type amorphous silicon layer.

A solar cell is provided with: an n-type single crystal silicon substrate; an n-type amorphous silicon layer disposed on a first main surface of the n-type single crystal silicon substrate; a light receiving surface electrode disposed on the n-type amorphous silicon layer; a p-type amorphous silicon layer disposed on a second main surface of the n-type single crystal silicon substrate; and a rear surface electrode disposed on the p-type amorphous silicon layer. The n-type single crystal silicon substrate has a resistivity within a range of 3.5-13 Ωcm. An i-type amorphous silicon layer may be provided between the n-type single crystal silicon substrate and the n-type amorphous silicon layer, and another i-type amorphous silicon layer may be provided between the n-type single crystal silicon substrate and the p-type amorphous silicon layer.

An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.