Methods of fabricating emitter regions of solar cells are described. Methods of forming layers on substrates of solar cells, and the resulting solar cells, are also described.

A MOS field-effect transistor according to the present disclosure includes: an element isolation region that defines an active region; a source region and a drain region formed in the active region; a gate insulating film provided on a channel region between the source region and the drain region; and a gate electrode provided on the gate insulating film, in which the gate electrode has an electrode shape in which a potential at a border between the element isolation region and the active region becomes shallower than a potential at a channel center part.

Disclosed herein is a solid-state imaging device including: a laminated semiconductor chip configured to be obtained by bonding two or more semiconductor chip sections to each other and be obtained by bonding at least a first semiconductor chip section in which a pixel array and a multilayer wiring layer are formed and a second semiconductor chip section in which a logic circuit and a multilayer wiring layer are formed to each other in such a manner that the multilayer wiring layers are opposed to each other and are electrically connected to each other; and a light blocking layer configured to be formed by an electrically-conductive film of the same layer as a layer of a connected interconnect of one or both of the first and second semiconductor chip sections near bonding between the first and second semiconductor chip sections. The solid-state imaging device is a back-illuminated solid-state imaging device.

An image sensor is provided. The image sensor includes a visible light receiving portion and an infrared receiving portion. The visible light receiving portion is configured to receive a visible light. The visible light receiving portion includes a first white filter. The infrared receiving portion is configured to receive infrared. The infrared receiving portion includes an infrared photodiode, a second white filter, and an infrared pass filter. The second white filter is disposed on the infrared photodiode. The infrared pass filter is disposed on the infrared photodiode. The infrared is received by the infrared photodiode after passing through the second white filter and the infrared pass filter.

This disclosure relates to image sensors and electronic apparatuses including the same. An image sensor including: a pixel area including shared pixels, wherein each of the shared pixels includes at least two photodiodes that form a group and share a floating diffusion (FD) area; and a transistor (TR) area adjacent to the pixel area, wherein the TR area includes transistor sets corresponding to the shared pixels, wherein, when a first shared pixel and a second shared pixel are arranged adjacent to each other in a first direction, a first TR set corresponding to the first shared pixel and a second TR set corresponding to the second shared pixel share a source region of a first selection TR.

A 3D semiconductor device, the device including: a first level including a plurality of first single crystal transistors, contacts, and a first metal layer, where a portion of the first single crystal transistors are interconnected, where the interconnected includes the first metal layer and the contacts, and where the portion of the first single crystal transistors are interconnected forms memory control circuits; a second level overlaying the first level, the second level including a plurality of second transistors; a third level overlaying the second level, the third level including a plurality of third transistors; a fourth level overlaying the third level, the fourth level including a plurality of fourth transistors; and a second metal layer overlaying the fourth level, where the plurality of second transistors are aligned to the plurality of first transistors with a less than 40 nm alignment error.

A semiconductor substrate has a first surface and a second surface which is opposite to the first surface. A photoelectric conversion portion has a PN junction configured with first and second semiconductor regions of different conductivity types. A buried portion is buried in the semiconductor substrate and includes an electrode and a dielectric member located between the electrode and the semiconductor substrate and in contact with the second semiconductor region. The second semiconductor region is located in a position deeper than the first semiconductor region. The buried portion is located to extend from a first surface to a position deeper than the first semiconductor region. Electric potentials are supplied to the first semiconductor region, the second semiconductor region, and the electrode in such a manner that an inversion layer occurring between the electrode and the second semiconductor region and the first semiconductor region are in contact with each other.

A semiconductor substrate has a first surface and a second surface which is opposite to the first surface. A photoelectric conversion portion has a PN junction configured with first and second semiconductor regions of different conductivity types. A buried portion is buried in the semiconductor substrate and includes an electrode and a dielectric member located between the electrode and the semiconductor substrate and in contact with the second semiconductor region. The second semiconductor region is located in a position deeper than the first semiconductor region. The buried portion is located to extend from a first surface to a position deeper than the first semiconductor region. Electric potentials are supplied to the first semiconductor region, the second semiconductor region, and the electrode in such a manner that an inversion layer occurring between the electrode and the second semiconductor region and the first semiconductor region are in contact with each other.

Disclosed is a solar cell including a semiconductor substrate, a first conductive area disposed on one surface of the semiconductor substrate, the first conductive area being of a first conductive type, a second conductive area of a second conductive type opposite to the first conductive type, a first electrode connected to the first conductive area, and a second electrode connected to the second conductive area. At least one of the first conductive area and the second conductive area is formed of a metal compound layer.

Disclosed is a solar cell including a semiconductor substrate, a first conductive area disposed on one surface of the semiconductor substrate, the first conductive area being of a first conductive type, a second conductive area of a second conductive type opposite to the first conductive type, a first electrode connected to the first conductive area, and a second electrode connected to the second conductive area. At least one of the first conductive area and the second conductive area is formed of a metal compound layer.