A light emitting device with on-chip optical power readout includes a light emitting mesa and a light detecting mesa formed adjacent to each other on the same substrate of a chip, and a portion of the light emitted from the light emitting mesa is transmitted to the light detecting mesa at least through the substrate. The light emitting mesa and the light detecting mesa have exactly the same epitaxial structure and can be electrically isolated from each other by an insulation layer, or an airgap formed therebetween, or by ion implantation. The light emitting mesa and the light detecting mesa can also share an n-type structure and a common n-electrode while having their own p-electrode, respectively.

An image capturing and display apparatus comprises a plurality of photoelectric conversion elements for converting incident light from the outside of the image capturing and display apparatus to electrical charge signals, and a plurality of light-emitting elements for emitting light of an intensity corresponding to the electrical charge signals acquired by the plurality of photoelectric conversion elements. A pixel region is defined as a region in which the plurality of photoelectric conversion elements are arranged in an array. Signal paths for transmitting signals from the plurality of photoelectric conversion elements to the plurality of light-emitting elements lie within the pixel region.

An image capturing and display apparatus comprises a plurality of photoelectric conversion elements for converting incident light from the outside of the image capturing and display apparatus to electrical charge signals, and a plurality of light-emitting elements for emitting light of an intensity corresponding to the electrical charge signals acquired by the plurality of photoelectric conversion elements. A pixel region is defined as a region in which the plurality of photoelectric conversion elements are arranged in an array. Signal paths for transmitting signals from the plurality of photoelectric conversion elements to the plurality of light-emitting elements lie within the pixel region.

An electrical device that includes a material stack present on a supporting substrate. An LED is present in a first end of the material stack having a first set of bandgap materials. A photovoltaic device is present in a second end of the material stack having a second set of bandgap materials. The first end of the material stack being a light receiving end, wherein a widest bandgap material for the first set of bandgap material is greater than a highest bandgap material for the second set of bandgap materials. A zinc oxide interface layer is present between the LED and the photovoltaic device. The zinc oxide layers or can also form a LED.

An electrical device that includes a material stack present on a supporting substrate. An LED is present in a first end of the material stack having a first set of bandgap materials. A photovoltaic device is present in a second end of the material stack having a second set of bandgap materials. The first end of the material stack being a light receiving end, wherein a widest bandgap material for the first set of bandgap material is greater than a highest bandgap material for the second set of bandgap materials. A zinc oxide interface layer is present between the LED and the photovoltaic device. The zinc oxide layers or can also form a LED.

Systems and methods for a focused field avalanche photodiode (APD) may include an absorbing layer, an anode, a cathode, an N-doped layer, a P-doped layer, and a multiplication region between the N-doped layer and the P-doped layer. Oxide interfaces are located at top and bottom surfaces of the anode, cathode, N-doped layer, P-doped layer, and multiplication region. The APD may absorb an optical signal in the absorbing layer to generate carriers, and direct them to a center of the cathode using doping profiles in the N-doped layer and the P-doped layer that vary in a direction perpendicular to the top and bottom surfaces. The doping profiles in the N-doped layer and the P-doped layer may have a peak concentration midway between the oxide interfaces, or the N-doped layer may have a peak concentration midway between the oxide interfaces while the P-doped layer may have a minimum concentration there.

Systems and methods for a focused field avalanche photodiode (APD) may include an absorbing layer, an anode, a cathode, an N-doped layer, a P-doped layer, and a multiplication region between the N-doped layer and the P-doped layer. Oxide interfaces are located at top and bottom surfaces of the anode, cathode, N-doped layer, P-doped layer, and multiplication region. The APD may absorb an optical signal in the absorbing layer to generate carriers, and direct them to a center of the cathode using doping profiles in the N-doped layer and the P-doped layer that vary in a direction perpendicular to the top and bottom surfaces. The doping profiles in the N-doped layer and the P-doped layer may have a peak concentration midway between the oxide interfaces, or the N-doped layer may have a peak concentration midway between the oxide interfaces while the P-doped layer may have a minimum concentration there.

A manufacturing method of a sensor chip package structure is provided. In the manufacturing method, a wafer including a plurality of sensor chips is provided, and each sensor chip has an active region and defines a pre-thinned region thereon. Each pre-thinned region is located at one side of the active region and covers a boundary line of each sensor chip. The pre-thinned region of each sensor chip is etched to form a concave portion. A redistribution layer is formed on the wafer. Subsequently, the wafer is cut to separate the sensor chips from one another, and each separated sensor chip has a wiring layer extending from the active region along a sidewall surface to a bottom surface of the concave portion. The separated sensor chips are respectively mounted on a plurality of substrates, and the active region is electrically connected to the substrate through the wiring layer.

A manufacturing method of a sensor chip package structure is provided. In the manufacturing method, a wafer including a plurality of sensor chips is provided, and each sensor chip has an active region and defines a pre-thinned region thereon. Each pre-thinned region is located at one side of the active region and covers a boundary line of each sensor chip. The pre-thinned region of each sensor chip is etched to form a concave portion. A redistribution layer is formed on the wafer. Subsequently, the wafer is cut to separate the sensor chips from one another, and each separated sensor chip has a wiring layer extending from the active region along a sidewall surface to a bottom surface of the concave portion. The separated sensor chips are respectively mounted on a plurality of substrates, and the active region is electrically connected to the substrate through the wiring layer.

A photodiode current comparison circuit has a first current source coupled to a circuit node configurable to operate in a first mode, a second current source coupled to the circuit node configurable to operate in a second mode opposite the first mode, and a third current source switchable to route a current to the circuit node in response to a data signal using a transistor coupled between the circuit node and the third current source. A photodiode is coupled to the circuit node. In a first configuration, an anode of the photodiode is coupled to the circuit node and a cathode of the photodiode is coupled to a power supply terminal. In a second configuration, a cathode of the photodiode is coupled to the circuit node and an anode of the photodiode is coupled to a power supply terminal. An amplifier provides an error signal of the photodiode.