The present disclosure relates to semiconductor structures and, more particularly, to an avalanche photodiode and methods of manufacture. The structure includes: a substrate material having a trench with sidewalls and a bottom composed of the substrate material; a first semiconductor material lining the sidewalls and the bottom of the trench; a photosensitive semiconductor material provided on the first semiconductor material; and a third semiconductor material provided on the photosensitive semiconductor material.

The present invention relates to a silicon carbide telescopic detector for ionizing radiation or a measuring instrument equipped with such a telescopic detector for identifying the type of ionizing radiation and/or measuring a dose released by the radiation, a detector production procedure, as well as uses and original methods which use the detector.

Germanium (Ge)-Silicon (Si) structures, optoelectronic devices and method for forming same. A structure comprises a Si substrate, a Ge seed layer and a Ge epitaxial layer separated by respective interfaces that share a common plane normal, wherein the Si substrate and the Ge seed layer have a same first doping type with a first doping level, and a locally doped region formed in the Si layer adjacent to the Ge seed layer and having a second doping type with a second doping level, wherein the locally doped region is designed to reduce leakage currents between the Si substrate and the Ge epitaxial layer when an electrical bias is applied to the structure.

The present invention relates to a silicon carbide telescopic detector for ionizing radiation or a measuring instrument equipped with such a telescopic detector for identifying the type of ionizing radiation and/or measuring a dose released by the radiation, a detector production procedure, as well as uses and original methods which use the detector.

Structures and techniques introduced here enable the design and fabrication of photodetectors (PDs) and/or other electronic circuits using typical semiconductor device manufacturing technologies meanwhile reducing the adverse impacts on PDs' performance. Examples of the various structures and techniques introduced here include, but not limited to, a pre-PD homogeneous wafer bonding technique, a pre-PD heterogeneous wafer bonding technique, a post-PD wafer bonding technique, their combinations, and a number of mirror equipped PD structures. With the introduced structures and techniques, it is possible to implement PDs using typical direct growth material epitaxy technology while reducing the adverse impact of the defect layer at the material interface caused by lattice mismatch.

A photovoltaic device includes an electrically-conductive front contact layer; an electrically-conductive back contact layer, the back contact layer being intended to be situated further from a source of incident light than the front contact layer; and a semiconductor-based PIN junction having a substantially amorphous intrinsic silicon layer sandwiched between a P-type doped semiconductor layer and an N-type doped semiconductor layer. The layer of the PIN junction situated closest to the back contact layer is a silicon-germanium alloy layer including at least 2 mol % of germanium.

Low noise silicon-germanium (SiGe) image sensor. In one embodiment, an image sensor includes a plurality of pixels arranged in rows and columns of a pixel array disposed in a semiconductor substrate. The photodiodes of an individual pixel are configured to receive an incoming light through an illuminated surface of the semiconductor substrate. The semiconductor substrate includes a first layer of semiconductor material having silicon (Si); and a second layer of semiconductor material having silicon germanium (Si1-xGex). A concentration x of Ge changes gradually through at least a portion of thickness of the second layer. Each photodiode includes a first doped region extending through the first layer of semiconductor material and the second layer of semiconductor material; and a second doped region extending through the first layer of semiconductor material and the second layer of semiconductor material.

The embodiments of the present disclosure describe a stressed Ge PD and fabrications techniques for making the same. In one embodiment, a stressor material is deposited underneath an already formed Ge PD. To do so, wafer bonding can be used to bond the wafer containing the Ge PD to a second, handler wafer. Doing so provides support to remove the substrate of the wafer so that a stressor material (e.g., silicon nitride, diamond-like carbon, or silicon-germanium) can be disposed underneath the Ge PD. The stress material induces a stress or strain in the crystal lattice of the Ge which changes its bandgap and improves its responsivity.

The present disclosure relates to semiconductor structures and, more particularly, to photodiodes and methods of manufacture. The structure includes: a top terminal; an intrinsic material in contact with the top terminal; and a bottom terminal in contact with the intrinsic material, the bottom terminal including a P semiconductor material and a fully depleted N semiconductor material.

A method for fabricating an image sensor array having a first group of photodiodes for detecting light at visible wavelengths a second group of photodiodes for detecting light at infrared or near-infrared wavelengths, the method including growing a germanium-silicon layer on a semiconductor donor wafer; defining pixels of the image sensor array on the germanium-silicon layer; defining a first interconnect layer on the germanium-silicon layer, wherein the interconnect layer includes a plurality of interconnects coupled to the first group of photodiodes and the second group of photodiodes; defining integrated circuitry for controlling the pixels of the image sensor array on a semiconductor carrier wafer; defining a second interconnect layer on the semiconductor carrier wafer, wherein the second interconnect layer includes a plurality of interconnects coupled to the integrated circuitry; and bonding the first interconnect layer with the second interconnect layer.