Patent classifications
H01L31/1812
Dielectric sidewall structure for quality improvement in Ge and SiGe devices
Some embodiments relate to an integrated circuit (IC) disposed on a silicon substrate, which includes a well region having a first conductivity type. An epitaxial pillar of SiGe or Ge extends upward from the well region. The epitaxial pillar includes a lower epitaxial region having the first conductivity type and an upper epitaxial region having a second conductivity type, which is opposite the first conductivity type. A dielectric layer is arranged over an upper surface of the substrate and is disposed around the lower epitaxial region to extend over outer edges of the well region. The dielectric layer has inner sidewalls that contact outer sidewalls of the epitaxial pillar. A dielectric sidewall structure has a bottom surface that rests on an upper surface of the dielectric layer and has inner sidewalls that extend continuously from the upper surface of the dielectric layer to a top surface of the epitaxial pillar.
METHOD FOR MANUFACTURING A UV-RADIATION DETECTOR DEVICE BASED ON SIC, AND UV-RADIATION DETECTOR DEVICE BASED ON SIC
A device for detecting UV radiation, comprising: a SiC substrate having an N doping; a SiC drift layer having an N doping, which extends over the substrate; a cathode terminal; and an anode terminal. The anode terminal comprises: a doped anode region having a P doping, which extends in the drift layer; and an ohmic-contact region including one or more carbon-rich layers, in particular graphene and/or graphite layers, which extends in the doped anode region. The ohmic-contact region is transparent to the UV radiation to be detected.
Integrated optical sensor with pinned photodiodes
An integrated optical sensor is formed by a pinned photodiode. A semiconductor substrate includes a first semiconductor region having a first type of conductivity located between a second semiconductor region having a second type of conductivity opposite to the first type one and a third semiconductor region having the second type of conductivity. The third semiconductor region is thicker, less doped and located deeper in the substrate than the second semiconductor region. The third semiconductor region includes both silicon and germanium. In one implementation, the germanium within the third semiconductor region has at least one concentration gradient. In another implementation, the germanium concentration within the third semiconductor region is substantially constant.
Microstructure enhanced absorption photosensitive devices
Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as pillars and/or holes, effectively increase the effective absorption length resulting in a greater absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more.
DIELECTRIC SIDEWALL STRUCTURE FOR QUALITY IMPROVEMENT IN GE AND SIGE DEVICES
Some embodiments relate to an integrated circuit (IC) disposed on a silicon substrate, which includes a well region having a first conductivity type. An epitaxial pillar of SiGe or Ge extends upward from the well region. The epitaxial pillar includes a lower epitaxial region having the first conductivity type and an upper epitaxial region having a second conductivity type, which is opposite the first conductivity type. A dielectric layer is arranged over an upper surface of the substrate and is disposed around the lower epitaxial region to extend over outer edges of the well region. The dielectric layer has inner sidewalls that contact outer sidewalls of the epitaxial pillar. A dielectric sidewall structure has a bottom surface that rests on an upper surface of the dielectric layer and has inner sidewalls that extend continuously from the upper surface of the dielectric layer to a top surface of the epitaxial pillar.
TIME-OF-FLIGHT SENSOR AND METHOD FOR FABRICATING A TIME-OF-FLIGHT SENSOR
A time-of-flight sensor includes at least one pixel, including: a Si-based photocurrent collecting structure and a Ge-based photosensitive structure epitaxially grown on the photocurrent collecting structure, wherein the photocurrent collecting structure includes an n-doped region and a p-doped region, wherein the n-doped region is configured to conduct electrons of a photocurrent to at least one n-contact and wherein the p-doped region is configured to conduct holes of the photocurrent to at least one p-contact and wherein the conduction band in the p-doped region includes a barrier for the electrons of the photocurrent and the valence band in the n-doped region includes a barrier for the holes of the photocurrent.
PHOTODETECTORS AND METHODS OF FORMATION
A stacked (or vertically arranged) photodetector having at least one contact region on a germanium sensing region. Including the at least one contact on the germanium sensing region reduces the amount of surface area of the germanium sensing region that is interfaced with a substrate (e.g., a silicon substrate) in which the germanium sensing region is included. This reduces the amount of lattice mismatch reduces the amount of misfit defects for the germanium sensing region, which reduces the dark current for the photodetector. The reduced amount of dark current may increase the photosensitivity of the photodetector, may increase low-light performance of the photodetector, and/or may decrease noise and other defects in images and/or light captured by the photodetector, among other examples.
SHORT-WAVE INFRARED AND MID-WAVE INFRARED OPTOELECTRONIC DEVICE AND METHODS FOR MANUFACTURING THE SAME
There is provided an optoelectronic device having an operation range reaching and exceeding 4 μm. The optoelectronic device includes a silicon or a silicon-based substrate and a heterostructure at least partially extending over the substrate. The heterostructure includes a stack of coextending photoactive layers and each photoactive layer includes one or two group IV elements. The photoactive layers are configured for absorbing and/or emitting short-wave infrared and mid-wave infrared radiation. In some embodiments, the short-wave infrared and mid-wave infrared radiation is in a wavelength range extending from about 1 μm to about 8 μm. Methods for manufacturing such an optoelectronic device and device processing are also provided. The methods include forming a heterostructure on a substrate, releasing the heterostructure from the substrate to form a relaxed membrane and transferring the relaxed membrane on a host substrate.
PHOTODIODE DETECTOR AND METHOD OF FABRICATING THE SAME
According to embodiments of the present invention, a photodiode detector is provided. The photodiode detector includes an optical cavity including an overlying light-receiving portion and an underlying minor; and a GeSn absorption layer. The GeSn absorption layer may be disposed within the optical cavity and arranged between the overlying light-receiving portion and the underlying mirror. The overlying light-receiving portion may be configured to receive light to be detected by the photodiode detector. According to further embodiments of the present invention, a method of fabricating a photodiode detector is also provided.
Capping structures for germanium-containing photovoltaic components and methods of forming the same
At least one doped silicon region is formed in a silicon layer of a semiconductor substrate, and a silicon oxide layer is formed over the silicon layer. A germanium-containing material portion is formed in the semiconductor substrate to provide a p-n junction or a p-i-n junction including the germanium-containing material portion and one of the at least one doped silicon region. A capping material layer that is free of germanium is formed over the germanium-containing material portion. A first dielectric material layer is formed over the silicon oxide layer and the capping material layer. The first dielectric material layer includes a mesa region that is raised from the germanium-containing material portion by a thickness of the capping material layer. The capping material layer may be a silicon capping layer, or may be subsequently removed to form a cavity. Dark current is reduced for the germanium-containing material portion.