A method of forming crystalline sheets using a Horizontal Ribbon Growth process, where the sheet of material formed in the process is withdrawn from a crucible in a specified manner to reduce instabilities in the process and to regulate crystal growth dynamics.

A method of fabricating solar cell, solar laminate and/or solar module string is provided. The method may include: locating a metal foil over a plurality of semiconductor substrates; exposing the metal foil to laser beam over selected portions of the plurality of semiconductor substrates, wherein exposing the metal foil to the laser beam forms a plurality conductive contact structures having of locally deposited metal portion electrically connecting the metal foil to the semiconductor substrates at the selected portions; and selectively removing portions of the metal foil, wherein remaining portions of the metal foil extend between at least two of the plurality of semiconductor substrates.

A laminated passivation structure of solar cell and a preparation method thereof are disclosed herein. The laminated passivation structure of solar cell includes a P-type silicon substrate, a first dielectric layer, a second dielectric layer, and a third dielectric layer sequentially arranged on the back side of the P-type silicon substrate from inside to outside. The preparation method includes generating a first dielectric layer on the back surface of the P-type silicon substrate, and then sequentially depositing a second dielectric layer and a third dielectric layer on the first dielectric layer.

A method is provided for fabricating a thin-film semiconductor substrate by forming a porous semiconductor layer conformally on a reusable semiconductor template and then forming a thin-film semiconductor substrate conformally on the porous semiconductor layer. An inner trench having a depth less than the thickness of the thin-film semiconductor substrate is formed on the thin-film semiconductor substrate. An outer trench providing access to the porous semiconductor layer is formed on the thin-film semiconductor substrate and is positioned between the inner trench and the edge of the thin-film semiconductor substrate. The thin-film semiconductor substrate is then released from the reusable semiconductor template.

A method for preparing silicon substrate having average crystallite size greater than or equal to 20 μm, including at least the steps of: (i) providing polycrystalline silicon substrate of which average grain size is less than or equal to 10 μm; (ii) subjecting substrate to overall homogeneous plastic deformation, at temperature of at least 1000° C.; (iii) subjecting substrate to localized plastic deformation in plurality of areas of substrate, called external stress areas, spacing between two consecutive areas being at least 20 μm, local deformation of substrate being strictly greater than overall deformation carried out in step (ii); step (iii) being able to be carried out subsequent to or simultaneous to step (ii); and (iv) subjecting substrate obtained in step (iii) to recrystallization heat treatment in solid phase, at temperature strictly greater than temperature used in step (ii), in order to obtain desired substrate.

The present invention relates to a method for producing highly doped polycrystalline semiconductor layers on a semiconductor substrate, wherein a first Si precursor composition comprising at least one first dopant is applied to one or more regions of the surface of the semiconductor substrate; optionally a second Si precursor composition comprising at least one second dopant is applied to one or more other regions of the surface of the semiconductor substrate, where the first dopant is an n-type dopant and the second dopant is a p-type dopant or vice versa; and the coated regions of the surface of the semiconductor substrate are each converted, so as to form polycrystalline silicon from the Si precursor. The invention further relates to the semiconductor obtainable by the method and to the use thereof, especially in the production of solar cells.

Photovoltaic structures are provided with field-effect inversion/accumulation layers as emitter layers induced by work-function differences between gate conductor layers and substrates thereof. Localized contact regions are in electrical communication with the gate conductors of such structures for repelling minority carriers. Such localized contact regions may include doped crystalline or polycrystalline silicon regions between the gate conductor and silicon absorption layers. Fabrication of the structures can be conducted without alignment between metal contacts and the localized contact regions or high temperature processing.

The invention relates to a process for fabricating a solar cell. The process comprises depositing a layer of amorphous silicon on a substrate using physical vapour deposition, said substrate being a layer of a dielectric disposed on a silicon wafer. The amorphous silicon is then annealed so as to generate a layer of polycrystalline silicon on the substrate.

A solar cell, and methods of fabricating said solar cell, are disclosed. The solar cell can include a substrate having a light-receiving surface and a back surface. The solar cell can include a first semiconductor region of a first conductivity type disposed on a first dielectric layer, wherein the first dielectric layer is disposed on the substrate. The solar cell can also include a second semiconductor region of a second, different, conductivity type disposed on a second dielectric layer, where a portion of the second thin dielectric layer is disposed between the first and second semiconductor regions. The solar cell can include a third dielectric layer disposed on the second semiconductor region. The solar cell can include a first conductive contact disposed over the first semiconductor region but not the third dielectric layer. The solar cell can include a second conductive contact disposed over the second semiconductor region, where the second conductive contact is disposed over the third dielectric layer and second semiconductor region. In an embodiment, the third dielectric layer can be a dopant layer.

A manufacturing method for a flexible silicon-based cell module is provided. Specifically, cell units of a silicon-based solar cell structure are arranged and adhered to a connecting strip to form a cell string, wherein a gap is left between two adjacent cell units. The cell units in cell strings are connected in series and parallel by an interconnected bar, wherein a gap is left between two adjacent cell strings. Hard protection units adapted to the size and specification of the cell units are respectively attached to the cell units. A plurality of cell strings are connected to each other in series and parallel to form a cell assembly. A panel made of flexible material is selected to package the cell assembly to form the flexible cell module. The cell module has an excellent rollable performance and a flexible expansion, a light weight, and a small size.