A light sensor includes an N-type semiconductor. The light sensor further includes a P-type semiconductor stacked on at least a portion of the N-type semiconductor, partially defining a trench extending into the P-type semiconductor, and having a trench portion aligned with the trench and extending farther into the N-type semiconductor than other portions of the P-type semiconductor. The light sensor also includes a passivation layer stacked on and contacting the P-type semiconductor and partially defining the trench that extends through the passivation layer and into the P-type semiconductor. The light sensor further includes an electrical contact stacked on the passivation layer, positioned within the trench, and extending through the passivation layer into the P-type semiconductor such that photons received by the N-type semiconductor generate photocurrent resulting in a voltage at the electrical contact.

Disclosed herein is an apparatus and a method of making the apparatus. The method comprises obtaining a plurality of semiconductor single crystal chunks. Each of the plurality of semiconductor single crystal chunks may have a first surface and a second surface. The second surface may be opposite to the first surface. The method may further comprise bonding the plurality of semiconductor single crystal chunks by respective first surfaces to a first semiconductor wafer. The plurality of semiconductor single crystal chunks forming a radiation absorption layer. The method may further comprise forming a plurality of electrodes on respective second surfaces of each of the plurality of semiconductor single crystal chunks, depositing pillars on each of the plurality of semiconductor single crystal chunks and bonding the plurality of semiconductor single crystal chunks to a second semiconductor wafer by the pillars.

A photovoltaic device includes a substrate structure and at least one Se-containing layer, such as a CdSeTe layer. A process for manufacturing the photovoltaic device includes forming the CdSeTe layer over a substrate by at least one of sputtering, evaporation deposition, CVD, chemical bath deposition process, and vapor transport deposition process. The process can also include controlling a thickness range of the Se-containing layer.

A photovoltaic device includes a substrate structure and at least one Se-containing layer, such as a CdSeTe layer. A process for manufacturing the photovoltaic device includes forming the CdSeTe layer over a substrate by at least one of sputtering, evaporation deposition, CVD, chemical bath deposition process, and vapor transport deposition process. The process can also include controlling a thickness range of the Se-containing layer.

A method for annealing an absorber layer is disclosed, the method including contacting a surface of the absorber layer with an annealing material provided as a gel. The annealing material comprises cadmium chloride and a thickening agent. A viscosity of the gel of the annealing material is greater than or equal to 5 millipascal seconds.

An integrated circuit includes a photodetector. The photodetector includes one or more dielectric structures positioned in a trench in a semiconductor substrate. The photodetector includes a photosensitive material positioned in the trench and covering the one or more dielectric structures. A dielectric layer covers the photosensitive material. The photosensitive material has an index of refraction that is greater than the indices of refraction of the dielectric structures and the dielectric layer.

A substrate to fabricate a photodiode structure has a top layer made from cadmium-doped semiconductor material. A first HgCdTe-base layer is formed by liquid phase epitaxy from the top layer with a bath containing an n-type electrically active dopant to electrically dope the first layer. The cadmium diffuses from the top layer to the first layer to form a decreasing cadmium concentration gradient from the interface with the top layer in a direction away from the interface. The cadmium concentration gradient causes a decreasing band gap width gradient in the first layer from the interface and causes an n-type dopant concentration gradient in the first layer from the interface.

Embodiments of a photovoltaic device are provided herein. The photovoltaic device can include a layer stack and an absorber layer disposed on the layer stack. The absorber layer can include a first region and a second region. Each of the first region of the absorber layer and the second region of the absorber layer can include a compound comprising cadmium, selenium, and tellurium. An atomic concentration of selenium can vary across the absorber layer. The first region of the absorber layer can have a thickness between 100 nanometers to 3000 nanometers. The second region of the absorber layer can have a thickness between 100 nanometers to 3000 nanometers. A ratio of an average atomic concentration of selenium in the first region of the absorber layer to an average atomic concentration of selenium in the second region of the absorber layer can be greater than 10.

An electrical device includes a substrate with a compressive layer, a neutral stress buffer layer and a tensile stress compensation layer. The stress buffer layer and the stress compensation layer may each be formed with aluminum nitride using different processing parameters to provide a different intrinsic stress value for each layer. The aluminum nitride tensile layer is configured to counteract stresses from the compressive layer in the device to thereby control an amount of substrate bow in the device. This is useful for protecting fragile materials in the device, such as mercury cadmium telluride. The aluminum nitride stress compensation layer also can compensate for forces, such as due to CTE mismatches, to protect the fragile layer. The device may include temperature-sensitive materials, and the aluminum nitride stress compensation layer or stress buffer layer may be formed at a temperature below the thermal degradation temperature of the temperature-sensitive material.

Monolithic pixel detectors, systems and methods for the detection and imaging of electromagnetic radiation with high spectral and spatial resolution comprise a Si wafer with a CMOS processed pixel readout bonded to an absorber wafer in wafer bonds comprising conducting bonds between doped, highly conducting charge collectors in the readout and highly conducting regions in the absorber wafer and poorly conducting bonds between regions of high resistivity.