Provided is a semiconductor light receiving element which can achieve a high-speed operation without sacrificing light receiving sensitivity while increasing the margin of a manufacturing process. The semiconductor light receiving element according to the present invention is characterized by comprising: a semiconductor layer doped with a first impurity; a semiconductor light absorption layer in which a band gap energy is adjusted to absorb incident light on the semiconductor layer doped with the first impurity; a semiconductor layer on the semiconductor light absorption layer and doped with a second impurity; and a metal electrode contacting side surfaces of the semiconductor layer doped with the second impurity, wherein side surfaces of the metal electrode are surfaces parallel to a growth direction of the semiconductor layer doped with the second impurity.

A system includes a substrate. The system also includes a detector array disposed over the substrate, where the detector array includes multiple detector pixels. The system further includes multiple plasmonic gratings disposed over top surfaces of the detector pixels, where each plasmonic grating includes multiple convex polyhedrons separated by valleys. Each detector pixel may have a mesa shape, and the convex polyhedrons of the plasmonic gratings may have a smaller size than the mesa shape of the detector pixels. A dimension across a base of each convex polyhedron of the plasmonic gratings may be selected based on a desired resonance wavelength of the plasmonic gratings.

Diffusion-based and ion implantation-based methods are provided for fabricating planar photodetectors. The methods may be used to fabricate planar photodetectors comprising type II superlattice absorber layers but without mesa structures. The fabricated planar photodetectors exhibit high quantum efficiencies, low dark current densities, and high specific detectivities as compared to photodetectors having mesa structures.

An embodiment photodetector includes a clad layer formed on a substrate, a first semiconductor layer formed on the clad layer, and a second semiconductor layer and a third semiconductor layer with the first semiconductor layer interposed therebetween formed on the clad layer. The photodetector includes a light absorbing layer made of an n-type III-V compound semiconductor formed on the first semiconductor layer through an insulating layer.

A four junction solar cell and its method of manufacture including an upper first solar subcell composed of a semiconductor material having a first band gap; a second solar subcell adjacent to said first solar subcell and composed of a semiconductor material having a second band gap smaller than the first band gap and being lattice matched with the upper first solar subcell; a third solar subcell adjacent to said second solar subcell and composed of a semiconductor material having a third band gap smaller than the second band gap and being lattice matched with the second solar subcell; a graded interlayer adjacent to the third solar subcell and having a fourth band gap greater than the third band gap; and a bottom solar subcell adjacent to the graded interlayer and being lattice mismatched from the third solar subcell and having a fifth band gap smaller than the fifth band gap, wherein the selection of composition of the subcells and their band gaps maximizes the efficiency of the solar cell at a predetermined temperature value (between 28 and 70 degrees Centigrade) at a predetermined time after the initial deployment in space, (the time of the initial deployment being referred to as “beginning-of-life (BOL)”), such predetermined time being referred to as the “end-of-life (EOL)” time, and such time being at least one year.

A multijunction solar cell assembly and its method of manufacture including interconnected first and second discreate semiconductor body subassemblies disposed adjacent and parallel to each other, in the sense of the incoming illumination, each semiconductor body subassembly including first top subcell, and possibly third middle subcells and a bottom solar subcell; wherein the interconnected subassemblies form at least a Three junction solar cell by a series connection being formed between the bottom solar subcell in the first semiconductor body with its at least least two junctions and the bottom solar subcell in the second semiconductor body representing the additional junction.

A substrate, a first n-type contact layer, a buffer layer, a multiplication layer, an electric field control layer, an absorption layer, and a p-type contact layer are provided. An electrically conductive layer is formed in a central portion of the buffer layer. The substrate is made of a semiconductor having thermal conductivity higher than that of InP, such as SiC, and the first n-type contact layer is made of the same semiconductor as that of the substrate but having n-type conductivity. An n electrode is formed over the first n-type contact layer via a second n-type contact layer.

The present invention discloses a type-II superlattice photodetector with a low-thickness absorption region. The absorption region of the type-II superlattice photodetector includes an In(Bi)As layer and a Ga(N)Sb layer. The Bi element content in the In(Bi)As layer is less than 10%, and the Bi element content in the Ga(N)Sb layer is less than 5%. The present invention forms an InBiAs layer and a GaNSb layer by condensing the Bi element into the InAs layer and condensing the N element into the GaSb layer of a traditional InAs/GaSb type-II superlattice photodetector. Therefore, without changing the cut-off wavelength and performance of the detector, periodic and total thicknesses of the type-II superlattice photodetector material can be effectively reduced, and both costs of material use and molecular beam epitaxy can be reduced. In addition, the overall absorption coefficient of the material can be improved, and the volume of the entire device can be reduced.

A photovoltaic assembly dual junction solar cell for space use including a solar cell stack including first and second subcells stacked on each other and each including an epitaxially grown light absorbing layer. The first subcell is adjacent to a solar cell stack front, light-receiving surface and the second subcell is adjacent to a solar cell stack rear surface. The first subcell light absorbing layer has a larger bandgap than the second subcell light absorbing layer. A light reflecting element positioned adjacent to a second subcell light absorbing layer rear side is configured to reflect photons having an energy smaller than the bandgap energy of the second subcell light absorbing layer and/or photons having an energy larger than the bandgap energy of the second subcell light absorbing layer and smaller than the bandgap energy of the first subcell light absorbing layer with a reflectivity of at least 90%.

The present disclosure relates to a method for manufacturing a device, where the device includes, in order, a metamorphic contact layer, a first metamorphic junction, a metamorphic tunnel junction, and a second metamorphic junction. To produce the device, the manufacturing includes, in order, a first depositing of a buffer layer onto a substrate, a second depositing of the metamorphic contact layer, a third depositing of the first metamorphic junction, a fourth depositing of the metamorphic tunnel junction, a fifth depositing of the second metamorphic junction, and the removing of the buffer layer and the substrate.