An encapsulated integrated photodetector waveguide structures with alignment tolerance and methods of manufacture are disclosed. The method includes forming a waveguide structure bounded by one or more shallow trench isolation (STI) structure(s). The method further includes forming a photodetector fully landed on the waveguide structure.

Photodiode structures and methods of manufacture are disclosed. The method includes forming a waveguide structure in a dielectric layer. The method further includes forming a Ge material in proximity to the waveguide structure in a back end of the line (BEOL) metal layer. The method further includes crystallizing the Ge material into a crystalline Ge structure by a low temperature annealing process with a metal layer in contact with the Ge material.

A preparation method of a low-cost passivated contact full-back electrode solar cell includes: performing alkali polishing on a Si wafer; performing RCA cleaning and HF cleaning; growing a tunnel SiO.sub.x film layer, an in-situ doped amorphous Si film layer, and a texturing mask layer on the back of the Si wafer; performing annealing activation on the amorphous Si film layer to form a polycrystalline Si film layer; etching the texturing mask layer; performing double-sided texturing on the Si wafer; performing HF cleaning to remove the texturing mask layer; depositing an AlO.sub.x film on the front and back of the Si wafer; depositing a SiN.sub.x passivation film on the front and back of the Si wafer; ablating a part of the AlO.sub.x film and a part of the SiN.sub.x passivation film on the back of the Si wafer; and performing screen-printing and sintering on the back of the Si wafer.

Double-sided tunneling silicon-oxide passivated back-contact solar cell and its preparation method including silicon wafer with front surface and back surface. On the back surface of silicon wafer, first semiconductor layer and second semiconductor layer are provided, while on the front surface of silicon wafer, passivation layer is provided. The first semiconductor layer includes first tunneling silicon-oxide layer and first doped polycrystalline silicon layer. The passivation layer includes second tunneling silicon-oxide layer and second doped polycrystalline silicon layer. The thickness of first doped polycrystalline silicon layer is 3-8 times that of second doped polycrystalline silicon layer. The back surface of silicon wafer is provided with first phosphorus-doped diffusion region, and the front surface of silicon wafer, which is textured surface, is provided with second phosphorus-doped diffusion region. The ratio of the depth of first phosphorus-doped diffusion region to the depth of second phosphorus-doped diffusion region ranges from 1-6:1.

In one aspect, the present invention provides a silicon photodetector having a surface layer that is doped with sulfur inclusions with an average concentration in a range of about 0.5 atom percent to about 1.5 atom percent. The surface layer forms a diode junction with an underlying portion of the substrate. A plurality of electrical contacts allow application of a reverse bias voltage to the junction in order to facilitate generation of an electrical signal, e.g., a photocurrent, in response to irradiation of the surface layer. The photodetector exhibits a responsivity greater than about 1 A/W for incident wavelengths in a range of about 250 nm to about 1050 nm, and a responsivity greater than about 0.1 A/W for longer wavelengths, e.g., up to about 3.5 microns.

An encapsulated integrated photodetector waveguide structures with alignment tolerance and methods of manufacture are disclosed. The method includes forming a waveguide structure bounded by one or more shallow trench isolation (STI) structure(s). The method further includes forming a photodetector fully landed on the waveguide structure.

A solar cell includes a photoelectric conversion layer, a doped layer, a first passivation layer, a first TCO layer, a front electrode and a back electrode. The doped layer is disposed on the front surface of the photoelectric conversion layer. The first passivation layer is disposed on the doped layer, wherein the first passivation layer has a plurality of openings exposing a portion of the doped layer. The first TCO layer is disposed on the first passivation layer and in the openings, and directly contacts the exposed doped layer via the openings, wherein a ratio of an area of the openings to an area of the first TCO layer is between 0.01 and 0.5. The front electrode is disposed on the first TCO layer. The back electrode is disposed on the back surface of the photoelectric conversion layer.

A method for manufacturing a solar cell, includes forming an oxide layer on first surface of a single crystalline silicon substrate; forming a poly crystalline silicon layer doped with a first dopant having a first conductive type on the oxide layer; diffusing a second dopant having a second conductive type opposite to the first conductive type into a second surface of the single crystalline silicon substrate thereby forming a diffusion region; forming a first passivation layer on the poly crystalline silicon layer; forming a second passivation layer on the diffusion region; forming a first electrode connected to the poly crystalline silicon layer by printing a first paste on the first passivation layer and firing through; forming a second electrode connected to the diffusion region by printing a second paste on the second passivation layer and firing through.

A solar cell includes a semiconductor substrate containing impurities of a first conductive type; a tunnel layer positioned on the semiconductor substrate; an emitter region positioned on the tunnel layer and containing impurities of a second conductive type opposite the first conductive type; a dopant layer positioned on the emitter region and formed of a dielectric material containing impurities of the second conductive type; a first electrode connected to the semiconductor substrate; and a second electrode configured to pass through the dopant layer, and connected to the emitter region.

A method for manufacturing a solar cell, the method includes forming a tunneling layer on a semiconductor substrate; forming a semiconductor layer on the tunneling layer, wherein the forming of the semiconductor layer includes depositing a semiconductor material; forming a capping layer on the semiconductor layer; and forming an electrode connected to the semiconductor layer, wherein the tunneling layer is formed under a temperature higher than room temperature and a pressure lower than atmospheric pressure, wherein a pressure of the forming of the semiconductor layer is smaller than the pressure of the forming of the tunneling layer, wherein the forming of the semiconductor layer further comprises doping the semiconductor layer with dopants, and wherein the capping layer is formed between the forming of the semiconductor layer and the forming of the electrode.