Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.

A solar cell includes a semiconductor substrate of first conductivity type, including first and second principal surfaces; a region of the first conductivity type, including a semiconductor layer structure of the first conductivity type provided on the first principal surface; and a region of an second conductivity type, including a semiconductor layer structure of the second conductivity type provided on the first principal surface. The semiconductor layer structure of the first conductivity type is formed extending into the region of the second conductivity type. Thereby the solar cell is provided with a stack region where the semiconductor layer structure of the second conductivity type is formed on the semiconductor layer structure of the first conductivity type.

A solar cell of the present invention includes a collecting electrode extending in one direction on a first principal surface of a photoelectric conversion section. The collecting electrode includes first and second electroconductive layers in this order from the photoelectric conversion section side, and further includes an insulating layer provided with openings between the electroconductive layers. The first electroconductive layer is covered with the insulating layer, and the second electroconductive layer is partially in conduction with the first electroconductive layer through the openings of the insulating layer. The first electroconductive layer has non-central portions within a range from both ends of the first electroconductive layer, and a central portion between the two non-central portions, in a direction orthogonal to an extending direction of the first electroconductive layer. A density of openings at the central portion is higher than a density of openings at the non-central portion.

A solar cell includes: a crystalline semiconductor substrate of a first conductivity type; a first semiconductor layer provided on a first region on one principal surface of the substrate; a second semiconductor layer provided on a second region on the one principal surface different from the first region; a first transparent electrode layer provided on the first semiconductor layer; and a second transparent electrode layer provided on the second semiconductor layer. The first semiconductor layer includes a first amorphous semiconductor layer of the first conductivity type and a first crystalline semiconductor part extending from the one principal surface toward the first transparent electrode layer. The second semiconductor layer includes a second amorphous semiconductor layer of a second conductivity type different from the first conductivity type.

A flat panel detector includes a base substrate, a sensing electrode and a bias electrode over the base substrate, and an insulating layer over the sensing electrode and the bias electrode at a side distal from the substrate. A difference between thicknesses of regions of the insulating layer corresponding to the sensing electrode and the bias electrode respectively is not greater than a preset threshold. When a sufficiently high voltage is applied to the insulating layer and turned on, because the thickness thereof is relatively uniform, a dark current generated by the sensing electrode and the bias electrode under the insulating layer is relatively uniform, thereby improving detection accuracy of the flat panel detector.

Disclosed are embodiments of a thin-film photovoltaic technology including a single-junction crystalline silicon solar cell with a photonic-plasmonic back-reflector structure for lightweight, flexible energy conversion applications. The back-reflector enables high absorption for long-wavelength and near-infrared photons via diffraction and light-concentration, implemented by periodic texturing of the bottom-contact layer by nanoimprint lithography. The thin-film crystalline silicon solar cell is implemented in a heterojunction design with amorphous silicon, where plasma enhanced chemical vapor deposition (PECVD) is used for all device layers, including a low-temperature crystalline silicon deposition step. Excimer laser crystallization is used to integrate crystalline and amorphous silicon within a monolithic process, where a thin layer of amorphous silicon is converted to a crystalline silicon seed layer prior to deposition of a crystalline silicon absorber layer via PECVD. The crystalline nature of the absorber layer and the back-reflector enable efficiencies higher than what is achievable in other thin-film silicon devices.

A photovoltaic device includes: a p- or n-type semiconductor substrate; a p-type amorphous semiconductor film and an n-type amorphous semiconductor film on a first-face side; p-electrodes on the p-type amorphous semiconductor film; and n-electrodes on the n-type amorphous semiconductor film, wherein: the p-electrodes and the n-electrodes are arranged at intervals; the p-type amorphous semiconductor film surrounds the n-type amorphous semiconductor film in an in-plane direction of the semiconductor substrate; the n-type amorphous semiconductor film has an edge portion providing an overlapping region where the n-type amorphous semiconductor film overlaps the p-type amorphous semiconductor film; and the n-electrodes are disposed in areas of the n-type amorphous semiconductor film that are surrounded by the overlapping region.

A method of manufacturing a solar cell can include forming a silicon oxide film on a semiconductor substrate and successively exposing the silicon oxide film to a temperature in a range of 570° C. to 700° C. to anneal the silicon oxide film.

A backside emitter solar cell structure having a heterojunction, and a method and a device for producing the same. A backside intrinsic layer is first formed on the back side of the substrate, then a frontside intrinsic layer and a frontside doping layer are formed on the front side of the substrate, and finally a backside doping layer is formed on the back side of the substrate.

An optoelectronic integrated substrate, a preparation method thereof and an optoelectronic integrated circuit. The electronic integrated substrate includes a base substrate and an electronic device and a photo-diode disposed on the base substrate, wherein the photo-diode includes an ohmic contact layer and an intrinsic amorphous silicon layer, and the ohmic contact layer and the intrinsic amorphous silicon layer are sequentially arranged along a direction parallel to the plane of the base substrate and are connected.