Patent classifications
H01L33/0012
METAL OXIDE SEMICONDUCTOR-BASED LIGHT EMITTING DEVICE
An optoelectronic semiconductor light emitting device configured to emit light having a wavelength in the range from about 150 nm to about 425 nm is disclosed. In embodiments, the device comprises a substrate having at least one epitaxial semiconductor layer disposed thereon, wherein each of the one or more epitaxial semiconductor layers comprises a metal oxide. Also disclosed is an optoelectronic semiconductor device for generating light of a predetermined wavelength comprising a substrate and an optical emission region. The optical emission region has an optical emission region band structure configured for generating light of the predetermined wavelength and comprises one or more epitaxial metal oxide layers supported by the substrate.
Light emitting diode
The present disclosure relates to a light emitting diode. The light emitting diode comprises a first semiconductor layer, a second semiconductor layer, an active layer, a first electrode, and a second electrode. The active layer is located between the first semiconductor layer and the second semiconductor layer. The first electrode is a first carbon nanotube, the second electrode is a second carbon nanotube. A first extending direction of the first carbon nanotube and a second extending direction of the second carbon nanotube are crossed with each other. A vertical p-n junction or a vertical p-i-n junction is formed by the first semiconductor layer and the second semiconductor layer in a direction perpendicular to the first semiconductor layer.
Resonant optical cavity light emitting device
Resonant optical cavity light emitting devices are disclosed, where the device includes a substrate, a first spacer region, a light emitting region, a second spacer region, and a reflector. The light emitting region is configured to emit a target emission deep ultraviolet wavelength and is positioned at a separation distance from the reflector. The reflector may be a distributed Bragg reflector. The device has an optical cavity comprising the first spacer region, the second spacer region and the light emitting region, where the optical cavity has a total thickness less than or equal to K.Math.λ/n. K is a constant ranging from 0.25 to 10, λ is the target wavelength, and n is an effective refractive index of the optical cavity at the target wavelength.
Forming method of flip-chip light emitting diode structure
The forming method of a flip-chip light emitting diode structure includes the following steps. A first substrate including a first semiconductor layer, an active layer on the first semiconductor layer and a second semiconductor layer on the active layer is provided. A first current blocking layer is formed on the second semiconductor layer, in which the first current blocking layer has a plurality of interspaces. A reflective layer covering the interspaces is formed, in which the reflective layer has a plurality of recesses, and each of the recesses is corresponding to each of the interspaces. A second current blocking layer filling into the recesses is formed.
High-voltage solid-state transducers and associated systems and methods
High-voltage solid-state transducer (SST) devices and associated systems and methods are disclosed herein. An SST device in accordance with a particular embodiment of the present technology includes a carrier substrate, a first terminal, a second terminal and a plurality of SST dies connected in series between the first and second terminals. The individual SST dies can include a transducer structure having a p-n junction, a first contact and a second contact. The transducer structure forms a boundary between a first region and a second region with the carrier substrate being in the first region. The first and second terminals can be configured to receive an output voltage and each SST die can have a forward junction voltage less than the output voltage.
HIGH-VOLTAGE SOLID-STATE TRANSDUCERS AND ASSOCIATED SYSTEMS AND METHODS
High-voltage solid-state transducer (SST) devices and associated systems and methods are disclosed herein. An SST device in accordance with a particular embodiment of the present technology includes a carrier substrate, a first terminal, a second terminal and a plurality of SST dies connected in series between the first and second terminals. The individual SST dies can include a transducer structure having a p-n junction, a first contact and a second contact. The transducer structure forms a boundary between a first region and a second region with the carrier substrate being in the first region. The first and second terminals can be configured to receive an output voltage and each SST die can have a forward junction voltage less than the output voltage.
Light emitting device and projector
In a light emitting device, a columnar part includes a first semiconductor layer, a second semiconductor layer different in conductivity type from the first semiconductor layer, and a light emitting layer disposed between the first semiconductor layer and the second semiconductor layer, the first semiconductor layer is disposed between the substrate and the light emitting layer, the light emitting layer includes a first layer, and a second layer larger in bandgap than the first layer, the first semiconductor layer has a facet plane, the first layer has a facet plane, the facet plane of the first semiconductor layer is provided with the first layer, and θ2>θ1, in which θ1 is a tilt angle of the facet plane of the first semiconductor layer with respect to a surface of the substrate provided with the laminated structure, and θ2 is a tilt angle of the facet plane of the first layer provided to the facet plane of the first semiconductor layer with respect to the surface of the substrate.
SEMICONDUCTOR LIGHT-EMITTING DEVICE
A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the first semiconductor layer includes a lateral outer perimeter surface surrounding the active layer; a plurality of vias penetrating the semiconductor stack to expose the first semiconductor layer; a first pad portion and a second pad portion formed on the semiconductor stack to respectively electrically connected to the first semiconductor layer and the second semiconductor layer, wherein the second pad portion and the first pad portion are arranged in a first direction; wherein the plurality of vias is arranged in a plurality of rows, the plurality of rows are arranged in the first direction and includes a first row and a second row, the first row is covered by the second pad portion, the second row is not covered by the first pad portion and the second pad portion, wherein a spacing between two adjacent vias in the first row is different from a spacing between two adjacent vias in the second row.
STRAIN BALANCED DIRECT BANDGAP ALUMINUM INDIUM PHOSPHIDE QUANTUM WELLS FOR LIGHT EMITTING DIODES
Described herein are optoelectronic devices and methods incorporating strain balanced direct bandgap Al.sub.xIn.sub.1-xP multiple quantum wells. The described devices are strain balanced in that the net strain between the ordered quantum wells and barriers is low, or in some cases zero. Advantageously, the described devices may be specifically designed for higher efficiency than existing Al.sub.xIn.sub.1-xP and may be grown on commercially available GaAs substrates.
LIGHT EMITTING ELEMENT
A light emitting element includes a substrate, a lower cladding layer, a lower confinement layer, an active layer, an upper confinement layer, an upper cladding layer, a tunnel junction layer, a window layer and an upper electrode sequentially arranged from bottom to top. The tunnel junction layer is for converting the window layer and upper electrode from the p-type of a traditional LED to the n-type of the light emitting element of this disclosure. Since the n-type window layer has a resistance much smaller than that of the p-type window layer, the window layer of this disclosure has low resistance and good current spreading effect to improve the light emitting efficiency. Since the n-type upper electrode has a resistance much lower than that of the p-type upper electrode, the n-type upper electrode of this disclosure is more conducive to ohmic contact than the p-type upper electrode of the traditional LED.