The application relates to a substrate structure, an on-chip structure, and a method for manufacturing the on-chip structure. The substrate structure includes a substrate body and an electrothermal layer. The electrothermal layer is arranged on a surface of the substrate body for growing an epitaxial layer. In an actual lift off process of the epitaxial layer, only the electrothermal layer is electrically conducted to an external power supply via an electrode, and heating of the electrothermal layer is utilized to heat the epitaxial layer, therefore, a part of the epitaxial layer in contact with the substrate structure can be thermally decomposed and separated from the substrate structure.

A red light-emitting micro-LED wafer includes a silicon substrate, a GaP buffer layer grown on the silicon substrate, a first doped (e.g., p-doped) GaP contact layer on the GaP buffer layer, an active region, and a second doped (e.g., n-doped) GaP contact layer on the active region. The active region includes a plurality of InGaP quantum barrier layers and one or more InGaAsP quantum well layers, where each of the one or more InGaAsP quantum well layers is sandwiched by two InGaP barrier layers of the plurality of InGaP barrier layers and is configured to emit red light. In some embodiments, the red light-emitting micro-LED wafer also includes a first doped AlGaP cladding layer between the first doped GaP contact layer and the active region, and a second doped AlGaP cladding layer between the second doped GaP contact layer and the active region.

A semiconductor device comprises a substrate, one or more first III-semiconductor layers, and a plurality of superlattice structures between the substrate and the one or more first layers. The plurality of superlattice structures comprises an initial superlattice structure and one or more further superlattice structures between the initial superlattice structure and the one or more first layers. The plurality of superlattice structures is configured such that a strain-thickness product of semiconductor layer pairs in each superlattice structure of the one or more further superlattice structures is greater than or equal to a strain-thickness product of semiconductor layer pairs in superlattice structure(s) of the plurality of superlattice structures between that superlattice structure and the substrate. The plurality of superlattice structures is also configured such that a strain-thickness product of semiconductor layer pairs in at least one of the one or more further superlattice structures is greater than a strain-thickness product of semiconductor layer pairs in the initial superlattice structure.

A light emitting element includes a light emitting element core extending in a direction and including first and second semiconductor layers and an element active layer disposed between the first and second semiconductor layers. The light emitting element includes an element electrode layer on the second semiconductor layer of the light emitting element core, and an element insulating film surrounding a side surface of the light emitting element core and a side surface of the element electrode layer. The element electrode layer overlaps the second semiconductor layer in the direction the light emitting element core extends, an area of the element electrode layer in plan view is smaller than an area of the second semiconductor layer in plan view, and the element insulating film completely exposes a surface of the element electrode layer, the surface being opposite to another surface of the element electrode layer facing the second semiconductor layer.

Epitaxial growth methods and devices are described that include a textured surface on a substrate in a liquid crystal device. Geometry of the textured surface provides a organization of a liquid crystal media.

A nanostructured hybrid particle, a manufacturing method thereof, and a device including the nanostructured hybrid particle are disclosed. The nanostructured hybrid particle includes a hydrophobic base particle having a convex-concave nanopattern on a surface thereof; a hydrophobic light-emitting nanoparticle disposed in a concave portion of the convex-concave nanopattern on the surface of hydrophobic base particle; and a coating layer covering the hydrophobic base particle and the hydrophobic light-emitting nanoparticle. In the nanostructured hybrid particle, light extraction may occur in all 3-dimensional directions, and thus, the nanostructured hybrid particle can exhibit high light extraction efficiency compared to light extraction occurring on a two-dimensional plane.

Provided is a semiconductor layer light-emitting element having tunneling blocking layers interposed between adjacent active regions, wherein the tunneling blocking layers are semiconductor layers, which do not allow the movement of an electron or a hole at an applied voltage sufficient to activate only one active region among all active regions, and independently separate two adjacent active regions in a quantum region range, so that the semiconductor light-emitting element comprises multiple independent active regions in a vertical direction in a single chip and thus can be driven at high voltages.

A method for fabricating a vertical light-emitting diode includes: providing a growth substrate, wherein an epitaxial layer is formed on the growth substrate; forming a metal combined substrate on the epitaxial layer, wherein the metal combined substrate comprises two first metal layers and a second metal layer therebetween, one of the first metal layers is close to the epitaxial layer, and another of the first metal layers is far away from the epitaxial layer; removing the growth substrate; forming a contact metal layer on the epitaxial layer; and removing the second metal layer and the first metal layer far away from the epitaxial layer and leaving the first metal layer close to the epitaxial layer. The vertical light-emitting diode, fabricated by the method, has a thinner thickness, a stronger mechanical strength, a higher light intensity, and a better heat-dissipating effect.

A semiconductor epitaxial structure and a method for manufacturing the same, and a light-emitting diode are provided. The semiconductor epitaxial structure includes a first-type semiconductor layer, a light-emitting layer, and a second-type semiconductor layer. The light-emitting layer is disposed on the first-type semiconductor layer. The second-type semiconductor layer is disposed on the light-emitting layer. The light-emitting layer includes potential well layers and potential barrier layers which are repeatedly stacked. At least part of potential barrier layers belonging to intermediate layers of the light-emitting layer is doped, and has a doping type same as the second-type semiconductor layer.

A process for fabricating a growth substrate comprises preparing a donor substrate by forming a crystalline semiconductor surface layer on a seed layer of a carrier. This preparation comprises forming the surface layer as a plurality of alternations of an InGaN primary layer and of an AlGaN secondary layer, the indium concentration and the thickness of the primary layers and the aluminum concentration and the thickness of the secondary layers being selected so that a homogeneous AlInGaN layer that is equivalent, in terms of concentration of aluminum and indium-, to the surface layer has a natural lattice parameter different from the lattice parameter of the seed layer.