A light emitting heterostructure including one or more fine structure regions is provided. The light emitting heterostructure can include a plurality of barriers alternating with a plurality of quantum wells. One or more of the barriers and/or quantum wells includes a fine structure region. The fine structure region includes a plurality of subscale features arranged in at least one of: a growth or a lateral direction.

A method of manufacturing a semiconductor substrate includes forming a first semiconductor layer on a substrate, forming a metallic material layer on the first semiconductor layer, forming a first portion of a second semiconductor layer on the first semiconductor layer and the metallic material layer, removing the metallic material layer under the first portion of the second semiconductor layer by dipping the substrate in a solution, forming a second portion of the second semiconductor layer on the first portion of the second semiconductor layer, and forming a cavity entirely through a portion of the first semiconductor layer located under where the metallic material layer was removed.

A method of manufacturing a micro-light-emitting diode display includes processing a wafer to form a plurality of functional chips integral with the wafer. A plurality of wafer tiles is defined in the wafer, wherein each wafer tile is composed of a cluster of functional chips. The wafer tiles are singulated by wafer dicing. A plurality of separate wafer tiles is bonded to a semiconductor wafer by hybrid bonding. The functional chips are singulated together with chips of the semiconductor wafer by dicing the bonded-together wafer tiles and semiconductor wafer.

Disclosed is a semiconductor device including a semiconductor structure including a first semiconductor layer, a second semiconductor layer, and an active layer disposed between the first semiconductor layer and the second semiconductor layer, a first electrode electrically connected to the first semiconductor layer, and a second electrode electrically connected to the second semiconductor layer. The semiconductor structure includes a first upper surface on which the first semiconductor layer is exposed, a second upper surface on which the second semiconductor layer is disposed, an inclined surface connecting the first upper surface and the second upper surface, and a recess formed between the first upper surface and the inclined surface. The recess has a depth less than or equal to 30% of a vertical distance between the first upper surface and the second upper surface.

The present invention relates to a multi-sided light-emitting circuit board, which includes: a transparent substrate layer and a first conductive circuit layer on at least one surface of the transparent substrate layer. The first conductive circuit layer includes conductive portions arranged at intervals. A metal piece is formed on a surface of each conductive portion away from the transparent substrate layer. An accommodation space is formed between adjacent metal pieces. The accommodation space is provided with a light-emitting chip. Each light-emitting chip includes two electrodes. The two electrodes are respectively located at opposite ends of the light-emitting chip. The electrodes are respectively electrically connected to adjacent metal pieces. An encapsulant layer is formed on a surface of the first conductive circuit layer. The encapsulant layer covers and encapsulates the metal pieces and the light-emitting chips. The invention also relates to a method for manufacturing a multi-faceted light-emitting circuit board.

Pixelated-LED chips include substrate sidewalls with sidewall involutions and/or increased sidewall surface area regions to affect light extraction therefrom. A LED lighting device incorporates a superstrate that supports lumiphoric material and includes sidewalls with sidewall involutions and/or increased sidewall surface area regions. Methods for fabricating sidewall features may include etching (e.g., deep etching) of substrate or superstrate materials, such as by using an etch mask having edges with non-linear shapes to produce and/or enhance sidewall involutions when an etchant is supplied through the etch mask to selectively consume substrate or superstrate material.

Methods and apparatus for processing a photonic device are provided herein. For example, methods include etching, using a plasma etch process that uses a first gas, a first epitaxial layer of material of the photonic device comprising a base layer comprising at least one of silicon, germanium, sapphire, aluminum indium gallium arsenide (Al.sub.xIn.sub.yGa.sub.1-x-yAs), aluminum indium gallium phosphide (Al.sub.xIn.sub.yGa.sub.1-x-yP), aluminum indium gallium nitride (Al.sub.xIn.sub.yGa.sub.1-x-yN), aluminum indium gallium arsenide phosphide (Al.sub.xIn.sub.yGa.sub.1-x-yAs.sub.zP.sub.1-z), depositing, using a plasma deposition process that uses a second gas different from the first gas, a first dielectric layer over etched sidewalls of the first epitaxial layer of material, etching, using the first gas, a second epitaxial layer of material of the photonic device, and depositing, using the second gas, a second dielectric layer over etched sidewalls of the second epitaxial layer of material.

An optical device includes a multilayered GaAs structure including a plurality of sublayers and an optical structure layer on the multilayered GaAs structure, the optical structure layer including a Group III-V compound semiconductor material. The optical structure layer may be, for example, a light-emitting layer having a multi-quantum well structure.

Disclosed herein are techniques for bonding components of LEDs. According to certain embodiments, a device includes a first component having a semiconductor layer stack including an n-side semiconductor layer, an active light emitting layer, and a p-side semiconductor layer. A plurality of mesa shapes are formed within the n-side semiconductor layer, the active light emitting layer, and the p-side semiconductor layer. The semiconductor layer stack comprises a III-V semiconductor material. The device also includes a second component having a passive or an active matrix integrated circuit within a Si layer. A first dielectric material of the first component is bonded to a second dielectric material of the second component, first contacts of the first component are aligned with and bonded to second contacts of the second component, and a run-out between the first contacts and the second contacts is less than 200 nm.

The invention relates to a method for producing an optical apparatus (200). The method comprises a step of providing a substrate (210) on whose first main surface (212) a plurality of emission devices (220) for emitting electromagnetic radiation (250, 255) are arranged. The substrate (210) is designed as a light-emitting diode wafer and/or formed from sapphire or gallium nitride and is transparent at least for one emission wavelength of the radiation (250, 255) emitted by the emission devices (220), The method also comprises a step of applying an absorption material (230) on the side of the first main surface (212) of the substrate (210). The absorption material (230) has a photostructurable resist that absorbs at least the emission wavelength. The method further comprises a step of processing the absorbing material (230) in order to lay bare at least one emission surface (227) of each emission device (220). In this case, a position determination of surfaces to be laid bare is carried out from a second main surface (214) of the substrate (210) opposite the first main surface (212). In addition, the method comprises a step of singulating the substrate (210) into a plurality of optical apparatuses (200) by means of a separating manufacturing process, wherein each optical apparatus (200) has at least one emission device (220).