Patent classifications
H01L33/0075
HIGH REFLECTIVITY WIDE BONDING PAD ELECTRODES
Disclosed herein are light emitting diode devices having one or more high reflectivity wide bonding pad electrodes and methods of fabricating thereof.
MICRO LIGHT-EMITTING DIODE CHIP AND MANUFACTURING METHOD THEREFOR, AND DISPLAY DEVICE
Provided are a micro light-emitting diode chip and a manufacturing method therefor, and a display device. The micro light-emitting diode chip comprises: a first-type semiconductor layer, a light-emitting layer and a second-type semiconductor layer which are sequentially stacked, wherein the light-emitting layer is located between the first-type semiconductor layer and the second-type semiconductor layer; and a reflective layer provided at a light-emitting side of the light-emitting layer, wherein the reflective layer is configured to block light emitted by the light-emitting layer to an edge of the micro light-emitting diode chip.
LIGHT-EMITTING DIODE AND DISPLAY DEVICE COMPRISING SAME
A light emitting element includes: a first semiconductor layer doped with a first polarity; a second semiconductor layer doped with a second polarity different from the first polarity; an active layer between the first semiconductor layer and the second semiconductor layer in a first direction; and an insulating film surrounding an outer surface of at least the active layer and extending in the first direction. A thickness of a first portion of the insulating film surrounding the active layer is in a range of 10% to 16% of a diameter of the active layer.
LIGHT-EMITTING DEVICE AND MANUFACTURING METHOD THEREOF AND MANUFACTURING METHOD OF LIGHT-EMITTING APPARATUS
A light-emitting device, including a first type semiconductor layer, a patterned insulating layer, a light-emitting layer, and a second type semiconductor layer, is provided. The patterned insulating layer covers the first type semiconductor layer and has a plurality of insulating openings. The insulating openings are separated from each other. The light-emitting layer is located in the plurality of insulating openings and covers a portion of the first type semiconductor layer. The second type semiconductor layer is located on the light-emitting layer.
III-nitride multi-wavelength LED for visible light communication
A light emitting diode (LED) array may include a first pixel and a second pixel on a substrate. The first pixel and the second pixel may include one or more tunnel junctions on one or more LEDs. The LED array may include a first trench between the first pixel and the second pixel. The trench may extend to the substrate.
Method of removing a substrate with a cleaving technique
A method of removing a substrate from III-nitride based semiconductor layers with a cleaving technique. A growth restrict mask is formed on or above a substrate, and one or more III-nitride based semiconductor layers are grown on or above the substrate using the growth restrict mask. The III-nitride based semiconductor layers are bonded to a support substrate or film, and the III-nitride based semiconductor layers are removed from the substrate using a cleaving technique on a surface of the substrate. Stress may be applied to the III-nitride based semiconductor layers, due to differences in thermal expansion between the III-nitride substrate and the support substrate or film bonded to the III-nitride based semiconductor layers, before the III-nitride based semiconductor layers are removed from the substrate. Once removed, the substrate can be recycled, resulting in cost savings for device fabrication.
HIGHLY EFFICIENT MICRODEVICES
Methods and structures are disclosed for highly efficient vertical devices. The vertical device comprising a plurality of planar active layers formed on a substrate, at least one of a top layer of the plurality of the layers is formed as a plurality of nano-pillars and a passivation layer formed on a space between the plurality of the nanopillars.
ENHANCED COLOUR CONVERSION
A method of forming a light emitting structure, the light emitting structure comprising: a light emitting region configured to emit light having a primary peak wavelength; a partially reflective region; a reflective region; and colour conversion region, wherein the light emitting region is positioned at least partially between the partially reflective layer and the reflective layer and the partially reflective region is positioned at least partially between the colour conversion region and the light emitting region, wherein the partially reflective region is configured to reflect light of a predetermined range of wavelengths and allow light outside the predetermined range of wavelengths to pass through the partially reflective region, wherein the primary peak wavelength is outside the predetermined range of wavelengths.
GROUP III NITRIDE STRUCTURES AND MANUFACTURING METHODS THEREOF
A group-III-nitride structure and a manufacturing method thereof are provided. In the manufacturing method, one or more grooves are formed by etching a first group-III-nitride epitaxial layer with a patterned first mask layer as a mask; then a second mask layer is formed at least on one or more bottom walls of the one or more grooves, and a first epitaxial growth is performed on the first group-III-nitride epitaxial layer to laterally grow and form a second group-III-nitride epitaxial layer with the second mask layer as a mask, where the one or more grooves are filled with the second group III-nitride epitaxial layer; a second epitaxial growth is then performed on the second group-III-nitride epitaxial layer to grow and form a third group-III-nitride epitaxial layer on the second group-III-nitride epitaxial layer and the patterned first mask layer.
VERTICAL DEEP-ULTRAVIOLET LIGHT-EMITTING DIODE AND METHOD FOR MANUFACTURING SAME
The present disclosure relates to a vertical deep-ultraviolet light-emitting diode and a method for manufacturing the same. The vertical deep-ultraviolet light-emitting diode includes: a conductive substrate, wherein the conductive substrate includes a first surface and a second surface opposite to the first surface; an epitaxial layer, disposed on the first surface of the conductive substrate, and comprising a P-type GaN layer, an electron blocking layer, a quantum well layer and an N-type AlGaN layer that are successively laminated along a direction from the second surface to the first surface, wherein the epitaxial layer has a thickness less than 1 μm; an N-type electrode, disposed on a surface, facing away from the conductive substrate, of the epitaxial layer; and a P-type electrode, disposed on the second surface.