A method for manufacturing a display array includes the following steps: providing a substrate and forming a semiconductor stacked layer on the substrate; forming an insulating layer and a plurality of electrode pads on an outer surface of the semiconductor stacked layer, the insulating layer and the electrode pads directly contacting the semiconductor stacked layer, wherein the insulating layer has a plurality of openings spaced apart from each other; and transferring the semiconductor stacked layer, the insulating layer and the electrode pads from the substrate to a driving backplane, wherein the electrode pads are respectively electrically connected to the driving backplane through the openings of the insulating layer to form a plurality of light emitting regions in the semiconductor stacked layer as the electrode pads and the semiconductor stacked layer are energized by the driving backplane.

A light-emitting device includes a substrate including a top surface; a semiconductor stack including a first semiconductor layer, an active layer and a second semiconductor layer formed on the substrate, wherein a portion of the top surface is exposed; a distributed Bragg reflector (DBR) formed on the semiconductor stack and contacting the portion of the top surface of the substrate; a metal layer formed on the distributed Bragg reflector (DBR), contacting the portion of the top surface of the substrate and being insulated with the semiconductor stack; and an insulation layer formed on the metal layer and contacting the portion of the top surface of the substrate.

A display device includes a circuit board including a first circuit portion, a second circuit portion, and a third circuit portion, a first display panel on the first circuit portion, and configured to emit a first light, a second display panel on the second circuit portion, and configured to emit a second light, a third display panel on the third circuit portion, and configured to emit a third light, and an optical combiner configured to combine the first light, the second light, and the third light to output a light.

A semiconductor light emitting device includes a conductive substrate and a first metal layer disposed on the substrate. The first metal layer is formed so as to be electrically connected with the substrate, and the first metal layer includes an Au based material. A joining layer is formed on the first metal layer. The joining layer includes a second metal layer including Au and a third metal layer including Au. A metallic contact layer and an insulating layer are formed on the joining layer. A semiconductor layer is formed on the metallic contact layer and the insulating layer and includes a red-based light emitting layer. An electrode is formed on the semiconductor layer and is made of metal. The insulating layer includes a patterned aperture, and at least a part of the metallic contact layer is formed in the aperture.

A high-voltage flip-chip semiconductor light-emitting device includes a substrate, at least two semiconductor light-emitting units, an isolation trench, a conducting layer, an isolating layer, a connecting layer, and a Bragg reflection layer. The semiconductor light-emitting units and the conducting layer are sequentially disposed on the substrate. The isolation trench is formed between the semiconductor light-emitting units. The isolating layer partially covers the conducting layer. The connecting layer is disposed on the isolating layer and electrically connects the semiconductor light-emitting units. The Bragg reflection layer covers the connecting layer and the isolating layer.

An improved heterostructure for an optoelectronic device is provided. The heterostructure includes an active region, an electron blocking layer, and a p-type contact layer. The heterostructure can include a p-type interlayer located between the electron blocking layer and the p-type contact layer. In an embodiment, the electron blocking layer can have a region of graded transition. The p-type interlayer can also include a region of graded transition.

Disclosed is a unit pixel of a micro-display capable of minimizing light emitted through a side surface. A side surface of the unit pixel having a vertically stacked pixel structure is etched and has inclination angle. Light directed toward the side surface is reflected by the side surface inclined at an angle, and the light is emitted in a direction perpendicular to the growth surface or the surface of the growth substrate.

A light emitting element includes: a substrate; a base layer disposed on the substrate; at least one rod-shaped light emitting portion comprising: a first conductivity type semiconductor rod disposed on the base layer and having a plurality of side surfaces arranged to form a polygonal column shape, an active layer formed of a semiconductor and covering the side surfaces of the first conductivity type semiconductor rod, and a second conductive type semiconductor layer covering the active layer. The active layer includes a plurality of well layers respectively disposed over at least two adjacent side surfaces among the plurality of side surfaces of the first conductivity type semiconductor rod. Adjacent well layers among the plurality of well layers are separated from each other along a ridge line where the at least two adjacent side surfaces are in contact with each other.

The forming method of a flip-chip light emitting diode structure includes the following steps. A first substrate including a first semiconductor layer, an active layer on the first semiconductor layer and a second semiconductor layer on the active layer is provided. A first current blocking layer is formed on the second semiconductor layer, in which the first current blocking layer has a plurality of interspaces. A reflective layer covering the interspaces is formed, in which the reflective layer has a plurality of recesses, and each of the recesses is corresponding to each of the interspaces. A second current blocking layer filling into the recesses is formed.

A light-emitting device includes a substrate, a semiconductor structure, and an insulating reflective layer. The substrate has an upper surface and a lower surface. The semiconductor structure is disposed on the upper surface of the substrate. A projection of the semiconductor structure on the upper surface of the substrate has an outer periphery spaced apart a distance from an outer periphery of the upper surface of the substrate. The insulating reflective layer covers at least a part of the semiconductor structure and has an extending portion extending outwardly from the semiconductor structure and covering a part of the upper surface of the substrate. A peripheral end of the extending portion of the insulating reflective layer has an inclined lateral surface, and an included angle defined between the inclined lateral surface and the upper surface of the substrate is not less than 60°.