Patent classifications
H01L33/18
Epitaxial oxide field effect transistor
The present disclosure describes epitaxial oxide field effect transistors (FETs). In some embodiments, a FET comprises: a substrate comprising an oxide material; an epitaxial semiconductor layer on the substrate; a gate layer on the epitaxial semiconductor layer; and electrical contacts. In some cases, the epitaxial semiconductor layer can comprise a superlattice comprising a first and a second set of layers comprising oxide materials with a first and second bandgap. The gate layer can comprise an oxide material with a third bandgap, wherein the third bandgap is wider than the first bandgap. In some cases, the epitaxial semiconductor layer can comprise a second oxide material with a first bandgap, wherein the second oxide material comprises single crystal A.sub.xB.sub.1-xO.sub.n, wherein 0<x<1.0, wherein A is Al and/or Ga, wherein B is Mg, Ni, a rare earth, Er, Gd, Ir, Bi, or Li.
Indium gallium nitride red light emitting diode and method of making thereof
A red-light emitting diode includes an n-doped portion, a p-doped portion, and a light emitting region located between the n-doped portion and a p-doped portion. The light emitting region includes a light-emitting indium gallium nitride layer emitting light at a peak wavelength between 600 and 750 nm under electrical bias thereacross, an aluminum gallium nitride layer located on the light-emitting indium gallium nitride layer. and a GaN barrier layer located on the aluminum gallium nitride layer.
Group 13 element nitride layer, free-standing substrate and functional element
A layer of a crystal of a group 13 nitride selected from gallium nitride, aluminum nitride, indium nitride and the mixed crystals thereof has an upper surface and a bottom surface. The upper surface of a crystal layer of the group 13 nitride includes a linear high-luminance light-emitting part and a low-luminance light-emitting region adjacent to the high-luminance light-emitting part, observed by cathode luminescence. The high-luminance light-emitting part includes a portion extending along an m-plane of the crystal of the group 13 nitride. The crystal of the nitride of the group 13 element contains oxygen atoms in a content of 1×10.sup.18 atom/cm.sup.3 or less, silicon atoms, manganese atoms, carbon atoms, magnesium atoms and calcium atoms in contents of 1×10.sup.17 atom/cm.sup.3 or less, chromium atoms in a content of 1×10.sup.16 atom/cm.sup.3 or less and chlorine atoms in a content of 1×10.sup.15 atom/cm.sup.3 or less.
Group 13 element nitride layer, free-standing substrate and functional element
A layer of a crystal of a group 13 nitride selected from gallium nitride, aluminum nitride, indium nitride and the mixed crystals thereof has an upper surface and a bottom surface. The upper surface of a crystal layer of the group 13 nitride includes a linear high-luminance light-emitting part and a low-luminance light-emitting region adjacent to the high-luminance light-emitting part, observed by cathode luminescence. The high-luminance light-emitting part includes a portion extending along an m-plane of the crystal of the group 13 nitride. The crystal of the nitride of the group 13 element contains oxygen atoms in a content of 1×10.sup.18 atom/cm.sup.3 or less, silicon atoms, manganese atoms, carbon atoms, magnesium atoms and calcium atoms in contents of 1×10.sup.17 atom/cm.sup.3 or less, chromium atoms in a content of 1×10.sup.16 atom/cm.sup.3 or less and chlorine atoms in a content of 1×10.sup.15 atom/cm.sup.3 or less.
Light emitting element
A light emitting element includes: a substrate; a base layer disposed on the substrate; at least one rod-shaped light emitting portion comprising: a first conductivity type semiconductor rod disposed on the base layer and having a plurality of side surfaces arranged to form a polygonal column shape, an active layer formed of a semiconductor and covering the side surfaces of the first conductivity type semiconductor rod, and a second conductive type semiconductor layer covering the active layer. The active layer includes a plurality of well layers respectively disposed over at least two adjacent side surfaces among the plurality of side surfaces of the first conductivity type semiconductor rod. Adjacent well layers among the plurality of well layers are separated from each other along a ridge line where the at least two adjacent side surfaces are in contact with each other.
Light emitting element
A light emitting element includes: a substrate; a base layer disposed on the substrate; at least one rod-shaped light emitting portion comprising: a first conductivity type semiconductor rod disposed on the base layer and having a plurality of side surfaces arranged to form a polygonal column shape, an active layer formed of a semiconductor and covering the side surfaces of the first conductivity type semiconductor rod, and a second conductive type semiconductor layer covering the active layer. The active layer includes a plurality of well layers respectively disposed over at least two adjacent side surfaces among the plurality of side surfaces of the first conductivity type semiconductor rod. Adjacent well layers among the plurality of well layers are separated from each other along a ridge line where the at least two adjacent side surfaces are in contact with each other.
MICROMETER SCALE LIGHT-EMITTING DIODES
Nanowire light emitting diodes (LEDs) are operable for spontaneous emission of light at significantly reduced current densities and with very narrow linewidths relative to conventional LEDs.
LIGHT-EMITTING DEVICE AND PROJECTOR
A light-emitting device includes a laminate provided at a substrate, a first electrode provided on an opposite side of the laminate from the substrate, and a second electrode provided on an opposite side of the first electrode from the substrate. The laminate includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type different from the first conductivity type, and a light-emitting layer provided between the first semiconductor layer and the second semiconductor layer. The first semiconductor layer is provided between the substrate and the light-emitting layer. The first electrode constitutes a plurality of column portions. The second electrode is coupled to the plurality of column portions. The first electrode is a transparent electrode formed of a metal oxide transmitting light generated at the light-emitting layer.
Display device including nanostructured LEDs connected in parallel
The device according to the invention comprises a nanostructured LED with a first group of nanowires protruding from a first area of a substrate and a contacting means in a second area of the substrate. Each nanowire of the first group of nanowires comprises a p-i-n-junction and a top portion of each nanowire or at least one selection of nanowires is covered with a light-reflecting contact layer. The contacting means of the second area is in electrical contact with the bottom of the nanowires, the light-reflecting contact layer being in electrical contact with the contacting means of the second area via the p-i-n-junction. Thus when a voltage is applied between the contacting means of the second area and the light-reflecting contact layer, light is generated within the nanowire. On top of the light-reflecting contact layer, a first group of contact pads for flip-chip bonding can be provided, distributed and separated to equalize the voltage across the layer to reduce the average serial resistance.
METHOD FOR LOCAL REMOVAL OF SEMICONDUCTOR WIRES
A method for local removal of semiconductor wires (SW) including the following steps: —Provide a stack of layers including at least a substrate, a nucleation layer, a growth masking layer, and a layer including SW being grown from the nucleation layer through the growth masking layer, —Encapsulate the SW with an encapsulation layer so as to form a composite layer including SW and encapsulating material, —Pattern a hard mask on the composite layer, so as to expose regions of the composite layer, —Perform anisotropic etching of the composite layer in the exposed regions, the anisotropic etching having a selectivity S.sub.semicon:S.sub.encaps between semiconductor-based material and encapsulating material such as 0.9:1<S.sub.semicon:S.sub.encaps<1.1:1.