A display device includes a substrate including a pixel area, and a pixel disposed in the pixel area and including an emission area and a non-emission area. The pixel includes a first alignment electrode and a second alignment electrode spaced from each other on the substrate, an insulating layer disposed on the first and second alignment electrodes, at least one light emitting element disposed on the insulating layer between the first alignment electrode and the second alignment electrode in the emission area, a pattern disposed between the at least one light emitting element and the insulating layer and including a hydrophilic group, and a bank disposed on the insulating layer in the non-emission area and including a first opening corresponding to the emission area and a second opening spaced from the first opening of the bank.

A display device includes a substrate and pixels. The substrate includes: a display area including pixel areas, each including a first area and a second area; and a non-display area enclosing at least one side of the display area. The pixels are disposed on the pixel areas, each pixel including light emitting elements. Each pixel further includes: a pixel circuit part disposed on the first area and including at least one transistor and at least one capacitor; and a display element part disposed on the second area and including an emission area to emit light. Each of the pixel circuit part and the display element part has a multi-layer structure including one or more conductive layers and one or more insulating layers. At least one layer of the pixel circuit part and at least one layer of the display element part are disposed in a same layer.

A display device includes a substrate and pixels. The substrate includes: a display area including pixel areas, each including a first area and a second area; and a non-display area enclosing at least one side of the display area. The pixels are disposed on the pixel areas, each pixel including light emitting elements. Each pixel further includes: a pixel circuit part disposed on the first area and including at least one transistor and at least one capacitor; and a display element part disposed on the second area and including an emission area to emit light. Each of the pixel circuit part and the display element part has a multi-layer structure including one or more conductive layers and one or more insulating layers. At least one layer of the pixel circuit part and at least one layer of the display element part are disposed in a same layer.

Provided is a substrate structure including a substrate, a buffer layer disposed on the substrate, a porous semiconductor layer disposed on the buffer layer, the porous semiconductor layer having a plurality of voids, a plurality of semiconductor light emitting structures disposed on the porous semiconductor layer, the plurality of semiconductor light emitting structures having a nanorod shape extending vertically, and a passivation film disposed on a side wall of each of the plurality of semiconductor light emitting structures, the passivation film having an insulation property.

A display device includes a pixel in a display area. The pixel may include a first electrode and a second electrode spaced from each other; a first insulating pattern on the first electrode, the first insulating pattern protruding to an outside of the first electrode while having a width greater than that of the first electrode; a second insulating pattern on the second electrode, the second insulating pattern protruding to an outside of the second electrode while having a width greater than that of the second electrode; a light emitting element arranged between the first insulating pattern and the second insulating pattern, the light emitting element including a first end and a second end; a third insulating pattern on a portion of the light emitting element to expose the first end and the second end of the light emitting element; and a first contact electrode on the light emitting element.

A display device includes a pixel in a display area. The pixel may include a first electrode and a second electrode spaced from each other; a first insulating pattern on the first electrode, the first insulating pattern protruding to an outside of the first electrode while having a width greater than that of the first electrode; a second insulating pattern on the second electrode, the second insulating pattern protruding to an outside of the second electrode while having a width greater than that of the second electrode; a light emitting element arranged between the first insulating pattern and the second insulating pattern, the light emitting element including a first end and a second end; a third insulating pattern on a portion of the light emitting element to expose the first end and the second end of the light emitting element; and a first contact electrode on the light emitting element.

A micro light-emitting device has an epitaxial die having a top surface, a bottom surface and a plurality of sidewalls connected between the top surface and the bottom surface. A roughness of at least one part of the surface of at least one of the sidewalls is smaller than or equal to 10 nm, or an etch-pit density of the at least one part of the surface is smaller than 10.sup.8/cm.sup.2, or a flatness tolerance of the at least one part of the surface is greater than 0.1 times a thickness of the epitaxial die. Therefore, the serious attenuation of the peak external quantum efficiency is prevented due to the sidewall damage effect after the light-emitting device is miniaturized.

A micro light-emitting device has an epitaxial die having a top surface, a bottom surface and a plurality of sidewalls connected between the top surface and the bottom surface. A roughness of at least one part of the surface of at least one of the sidewalls is smaller than or equal to 10 nm, or an etch-pit density of the at least one part of the surface is smaller than 10.sup.8/cm.sup.2, or a flatness tolerance of the at least one part of the surface is greater than 0.1 times a thickness of the epitaxial die. Therefore, the serious attenuation of the peak external quantum efficiency is prevented due to the sidewall damage effect after the light-emitting device is miniaturized.

A light emitting diode (LED) stack for a display including a first LED sub-unit configured to emit a first colored light, a second LED sub-unit disposed on the first LED sub-unit and configured to emit a second colored light, and a third LED sub-unit disposed on at least one of the first LED sub-unit and the second LED sub-unit and configured to emit a third colored light, in which the first LED sub-unit is configured to emit light through the second LED sub-unit and the third LED sub-unit, and the second LED sub-unit is configured to emit light through the third LED sub-unit.

A display device may include pixels disposed on a substrate, each of the pixels including a via layer disposed on the substrate and formed of an organic layer; first and second alignment electrodes disposed on the via layer; a first insulating layer disposed on the first and second alignment electrodes; a first bank pattern disposed on the first insulating layer on the first alignment electrode, and a second bank pattern disposed on the first insulating layer on the second alignment electrode; a second insulating layer disposed on the first and second bank patterns and the first insulating layer; at least one light emitting element disposed on the second insulating layer; a first electrode electrically connected to the light emitting element and the first alignment electrode; and a second electrode electrically connected to the light emitting element and the second alignment electrode. The first insulating layer may include an organic layer.