A system, method and device for use as a reflector for a light emitting diode (LED) are disclosed. The system, method and device include a first layer designed to reflect transverse-electric (TE) radiation emitted by the LED, a second layer designed to block transverse-magnetic (TM) radiation emitted from the LED, and a plurality of ITO layers designed to operate as a transparent conducting oxide layer. The first layer may be a one-dimension (1D) distributed Bragg reflective (DBR) layer. The second layer may be a two-dimension (2D) photonic crystal (PhC), a three-dimension (3D) PhC, and/or a hyperbolic metamaterial (HMM). The 2D PhC may include horizontal cylinder bars, vertical cylinder bars, or both. The system, method and device may include a bottom metal reflector that may be Ag free and may act as a bonding layer.

A system, method and device for use as a reflector for a light emitting diode (LED) are disclosed. The system, method and device include a first layer designed to reflect transverse-electric (TE) radiation emitted by the LED, a second layer designed to block transverse-magnetic (TM) radiation emitted from the LED, and a plurality of ITO layers designed to operate as a transparent conducting oxide layer. The first layer may be a one-dimension (1D) distributed Bragg reflective (DBR) layer. The second layer may be a two-dimension (2D) photonic crystal (PhC), a three-dimension (3D) PhC, and/or a hyperbolic metamaterial (HMM). The 2D PhC may include horizontal cylinder bars, vertical cylinder bars, or both. The system, method and device may include a bottom metal reflector that may be Ag free and may act as a bonding layer.

A light emitting diode (LED) stack for a display including a first LED sub-unit configured to emit a first colored light, a second LED sub-unit disposed on the first LED sub-unit and configured to emit a second colored light, and a third LED sub-unit disposed on at least one of the first LED sub-unit and the second LED sub-unit and configured to emit a third colored light, in which the first LED sub-unit is configured to emit light through the second LED sub-unit and the third LED sub-unit, and the second LED sub-unit is configured to emit light through the third LED sub-unit.

A light emitting diode (LED) stack for a display including a first LED sub-unit configured to emit a first colored light, a second LED sub-unit disposed on the first LED sub-unit and configured to emit a second colored light, and a third LED sub-unit disposed on at least one of the first LED sub-unit and the second LED sub-unit and configured to emit a third colored light, in which the first LED sub-unit is configured to emit light through the second LED sub-unit and the third LED sub-unit, and the second LED sub-unit is configured to emit light through the third LED sub-unit.

A lighting apparatus including at least one light emitting diode (LED) chip configured to emit blue light; a green phosphor having a light emission peak in a range of 500 nm to 550 nm; and a red phosphor having a light emission peak in a range of 600 nm to 650 nm, in which the red phosphor includes a first red phosphor having a light emission peak in a range of 620 nm to 630 nm and a second red phosphor having a light emission peak in a range of 630 nm to 640 nm, and the full widths at half maximum of the first and second red phosphors are in a range of 20 nm to 60 nm, respectively.

A lighting apparatus including at least one light emitting diode (LED) chip configured to emit blue light; a green phosphor having a light emission peak in a range of 500 nm to 550 nm; and a red phosphor having a light emission peak in a range of 600 nm to 650 nm, in which the red phosphor includes a first red phosphor having a light emission peak in a range of 620 nm to 630 nm and a second red phosphor having a light emission peak in a range of 630 nm to 640 nm, and the full widths at half maximum of the first and second red phosphors are in a range of 20 nm to 60 nm, respectively.

In an embodiment a component composite includes an auxiliary carrier, a plurality of components, a retaining structure and an electrically conductive sacrificial layer, wherein each of the components has a connection layer which faces the sacrificial layer and is electrically conductively connected to the sacrificial layer, wherein the sacrificial layer is arranged in vertical direction between the auxiliary carrier and the components, and wherein the sacrificial layer is to be removable and the components are mechanically connected to the auxiliary carrier only via the retaining structure in addition to the sacrificial layer.

The present disclosure relates to a red LED chip component, a red LED chip, a display panel and a manufacturing method. The red LED chip component includes an insulating substrate and a plurality of red LED chips arranged on the insulating substrate. The red LED chip and the insulating substrate are bonded by a thermal release adhesive layer.

A semiconductor device is provided. The semiconductor device includes a first semiconductor layer; a second semiconductor layer on the first semiconductor layer; an active region between the second semiconductor layer and the first semiconductor layer; an electron blocking structure between the active region and the second semiconductor layer; a first Group III-V semiconductor layer between the active region and the electron blocking structure; and a second Group III-V semiconductor layer between the electron blocking structure and the second semiconductor layer; wherein the first Group III-V semiconductor layer and the second Group III-V semiconductor layer each includes indium, aluminum and gallium, the first Group III-V semiconductor layer has a first indium content, the second Group III-V semiconductor layer has a second indium content, and the second indium content is less than the first indium content.

A semiconductor device is provided. The semiconductor device includes a first semiconductor layer; a second semiconductor layer on the first semiconductor layer; an active region between the second semiconductor layer and the first semiconductor layer; an electron blocking structure between the active region and the second semiconductor layer; a first Group III-V semiconductor layer between the active region and the electron blocking structure; and a second Group III-V semiconductor layer between the electron blocking structure and the second semiconductor layer; wherein the first Group III-V semiconductor layer and the second Group III-V semiconductor layer each includes indium, aluminum and gallium, the first Group III-V semiconductor layer has a first indium content, the second Group III-V semiconductor layer has a second indium content, and the second indium content is less than the first indium content.