A device relates to a semiconductor device. The semiconductor device includes a narrow-line bamboo microstructure integrated within a metal layer of the semiconductor device and a narrow-line polycrystalline microstructure. The narrow-line polycrystalline microstructure is integrated within the same metal layer as the narrow-line bamboo microstructure.

A magnetic trap is configured to arrange at least one diamagnetic rod. The magnetic trap includes first and second magnets on a substrate that forms the magnetic trap defining a template configured to self-assemble diamagnetic material. Each of the first and second magnets extends along a longitudinal direction to define a magnet length, and contact each other to define a contact line. The first magnet and the second magnet have a diametric magnetization in a direction perpendicular to the contact line and the longitudinal direction so as to generate a longitudinal energy potential that traps the diamagnetic rod along the longitudinal direction.

A method of forming a structure comprises forming a pattern of self-assembled nucleic acids over a material. The pattern of self-assembled nucleic acids is exposed to at least one repair enzyme to repair defects in the pattern. The repaired pattern of self-assembled nucleic acids is transferred to the material to form features therein. A method of decreasing defect density in self-assembled nucleic acids is also disclosed. Self-assembled nucleic acids exhibiting an initial defect density are formed over at least a portion of a material and the self-assembled nucleic acids are exposed to at least one repair enzyme to repair defects in the self-assembled nucleic acids. Additional methods are also disclosed.

A semiconductor device includes a non-insulator structure, at least one carbon nano-tube (CNT), a dielectric layer, and a graphene-based conductive layer. The CNT is over the non-insulator structure. The dielectric layer surrounds the CNT. The graphene-based conductive layer is over the at least one CNT. The CNTs and the graphene-based conductive layer have low resistance.

A biological sensing system, comprising a microelectrode array having a plurality of islands that are thermally isolated from each other and are interconnected by flexible nano-scale wires. An embedded complementary metal oxide semiconductor (CMOS) instrumentation amplifier and wireless communication circuitry may be operatively connected to the microelectrode array and embedded within input/output pads connected to the wires at the periphery of the array.

Semiconductor device and fabrication method are provided. The method includes: providing a base substrate with a bottom metallic layer in the base substrate and a dielectric layer on the base substrate; forming interconnect openings through the dielectric layer and exposing the bottom metallic layer, where each interconnect openings includes a contacting hole and a groove on the contacting hole; forming a first conducting layer in the contacting hole, where the first conducting layer is made of a material having a first conductivity along a direction from the bottom metallic layer to a top surface of the first conducting layer; and after forming the first conducting layer, forming a second conducting layer in the groove, where the second conducting layer is made of a material having a second conductivity along a direction parallel to the top surface of the base substrate and the first conductivity is greater than the second conductivity.

Nanotube films and articles and methods of making the same are disclosed. A conductive article or a substrate comprises at least two unaligned nanotubes extending substantially parallel to the substrate and each contacting end points of the article but each unaligned relative to the other, the nanotubes providing a conductive pathway within a predefined space.

An opening is formed in an insulating film being a formation site, vertical and parallel CNTs are formed, tip portions of the CNTs are inserted into the opening, and the CNTs are removed except for the tip portions inserted into the opening. With this configuration, a desired conductive structure with high reliability is realized by forming high-quality CNTs in an opening of a formation site without depending on a base material.

A method of manufacturing a graphene film manufactures a graphene film in good state without generating wrinkles and stresses and leaving residues of the resin. The method of manufacturing a graphene film comprises forming a catalyst metal film on a substrate; synthesizing a graphene film on the catalyst metal film; and removing the metal catalyst film in an oxidation atmosphere of an oxidizer and transferring the graphene film to the substrate.

Embodiments of the invention include a method for fabricating a semiconductor device and the resulting structure. A substrate is provided. A plurality of metal portions are formed on the substrate, wherein the plurality of metal portions are arranged such that areas of the substrate remain exposed. A thin film layer is deposited on the plurality of metal portions and the exposed areas of the substrate. A dielectric layer is deposited, wherein the dielectric layer is in contact with portions of the thin film layer on the plurality of metal portions, and wherein the dielectric layer is not in contact with portions of the thin film layer on the exposed areas of the substrate such that one or more enclosed spaces are present between the thin film layer on the exposed areas of the substrate and the dielectric layer.