A method of processing a semiconductor wafer includes: forming a first metal layer or metal layer stack on a backside of the semiconductor wafer; forming a plating preventative layer on the first metal layer or metal layer stack, the plating preventative layer being formed at least over a kerf region of the semiconductor wafer and such that part of the first metal layer or metal layer stack is uncovered by the plating preventative layer, wherein the kerf region defines an area for dividing the semiconductor wafer along the kerf region into individual semiconductor dies; and plating a second metal layer or metal layer stack on the part of the first metal layer or metal layer stack uncovered by the plating preventative layer, wherein the plating preventative layer prevents plating of the second metal layer or metal layer stack over the kerf region.

A light-emitting device includes a substrate and a semiconductor light-emitting stack. The substrate includes an upper surface, a first side surface, and a second side surface adjacent to the first side surface. The semiconductor light-emitting stack includes a first conductivity type semiconductor layer, a light-emitting layer, and a second conductivity type semiconductor layer that are sequentially disposed on the upper surface of the substrate in such order. The first side surface includes X number of first laser inscribed marks, and the second side surface includes Y number of second laser inscribed marks, in which Y>X>0 and Y≥3. A method for manufacturing the light-emitting device is also provided herein.

Implementations of methods of singulating a plurality of die included in a substrate may include forming a groove through a backside metal layer through laser ablating a backside metal layer at a die street of a substrate and singulating a plurality of die included in the substrate through removing substrate material of the substrate in the die street.

Microelectronic devices may include an active surface and a side surface. The side surface may include a first portion having a reflective surface and a second portion having a non-reflective surface. The reflective surface may be formed by depositing a conductive material in trenches formed in material of the wafer along streets between the microelectronic devices on a wafer. The conductive material may be heated. The wafer may be cooled after the conductive material is heated fracturing the wafer along the streets and separating the microelectronic devices.

Types, sizes, and locations of crystal defects of an epitaxial layer of a semiconductor wafer containing silicon carbide are detected. Next, a predetermined device element structure is formed and based on location information of the crystal defects of the semiconductor wafer, semiconductor chips free of crystal defects and semiconductor chips containing only extended defects (Frank dislocations, carrot defects) are identified as conforming product candidates among individual semiconductor chips cut from the semiconductor wafer while semiconductor chips containing foreign particle defects and triangular defects are removed as non-conforming chips. Next, electrical characteristics of all the semiconductor chips that are conforming product candidates are checked. Next, based on a conforming product standard obtained in advance, a standard judgment is performed for all the semiconductor chips that are conforming product candidates, whereby semiconductor chips that are conforming products are identified.

The invention relates to a functional chip (100) of which at least two electrical connection pads (11a, 11b) are intended for being connected to wire elements (40a, 40b). Said chip comprises: —a substrate (10) comprising a microelectronic component electrically connected to the two electrical connection pads arranged on a front face of said substrate (10), —a cover (20) comprising a first portion (21) assembled to the front face of the substrate (10), said first portion (21) forming a spacer between the two electrical connection pads; the cover (20) further comprising a second portion (22) spaced apart from the front face of the substrate (10) and extending opposite each electrical connection pad only partially, so as to allow access to said pads, along an axis (z) normal to the front face of the substrate (10). The invention likewise relates to a method for manufacturing such a functional chip.

A semiconductor device includes an active region and a trapping region positioned peripherally with respect to the active region, the trapping region presenting trapping apertures permitting the passage of particles, the trapping apertures being in fluid communication with at least one trapping chamber for trapping the particles. A method for manufacturing the semiconductor devices from one semiconductor wafer presents semiconductor device regions to be singulated along a dicing portion line. The method includes in each semiconductor device region, making a semiconductor device precursor by making or applying at least one active element in an active region, making at least one trapping chamber and making, in a trapping region of the semiconductor device region positioned more peripherally than the active region, trapping apertures in fluid communication with the at least one trapping chamber; and singulating the semiconductor device regions by separating the semiconductor device precursors along the dicing portion lines.

A wafer structure includes a semiconductor substrate that includes a chip region and a scribe lane region. A first dielectric layer is on a first surface of the semiconductor substrate, a second dielectric layer is on the first dielectric layer. A dielectric pattern is between the first dielectric layer and the second dielectric layer. A through via that penetrates the first surface and a second surface at the chip region of the semiconductor substrate, and a conductive pad is in the second dielectric layer and on the through via. The dielectric pattern includes an etch stop pattern on the chip region of the semiconductor substrate and in contact with a bottom surface of the conductive pad, and an alignment key pattern on the scribe lane region of the semiconductor substrate.

A manufacturing method of a semiconductor device includes the following steps. A semiconductor structure including a substrate, a gallium nitride layer, semiconductor device units, and a scribe line region is provided. The gallium nitride layer is disposed on a first surface of the substrate. The semiconductor device units and the scribe line region are disposed on the gallium nitride layer. The scribe line region is located between the semiconductor device units. A trench is formed at a second surface of the substrate. The trench is formed corresponding to the scribe line region in a vertical direction. The trench penetrates through at least a part of the substrate in the vertical direction. A metal layer is formed on the substrate after the trench is formed. A cutting process is performed to the semiconductor structure after the metal layer is formed for separating the semiconductor device units from one another.

A manufacturing method of a protective film agent for laser dicing that includes a solution preparation step of preparing a solution in which at least a water-soluble resin, an organic solvent, and an ultraviolet absorber are mixed; and an ion-exchange treatment step of carrying out ion exchange of sodium ions in the solution by using a cation-exchange resin.