Patent classifications
H01L2224/831
APPARATUS AND METHOD FOR SECURING SUBSTRATES WITH VARYING COEFFICIENTS OF THERMAL EXPANSION
An integrated circuit assembly that includes a semiconductor wafer having a first coefficient of thermal expansion; an electronic circuit substrate having a second coefficient of thermal expansion that is different than the first coefficient of thermal expansion; and an elastomeric connector arranged between the semiconductor wafer and the electronic circuit substrate and that forms an operable signal communication path between the semiconductor wafer and the electronic circuit substrate.
SEMICONDUCTOR ELEMENT BONDING APPARATUS AND SEMICONDUCTOR ELEMENT BONDING METHOD
Provided are a semiconductor element bonding apparatus and a semiconductor element bonding method that do not cause a bonding material to protrude and also ensure adhesion, even when there are variations in a thickness of a semiconductor element or a workpiece and even when there are projections and depressions on surfaces. A semiconductor element bonding apparatus includes disposing means for disposing a workpiece and a semiconductor element at positions facing each other, moving means for moving the workpiece or the semiconductor element in a vertical direction, displacement measuring means for measuring displacement of the workpiece or the semiconductor element in the vertical direction, load measuring means for measuring a contact load between the workpiece and the semiconductor element with the bonding material interposed therebetween, and elastic modulus calculating means for calculating an elastic modulus from results of the measurement by the displacement measuring means and the load measuring means.
METHODS OF FORMING POWER ELECTRONIC ASSEMBLIES USING METAL INVERSE OPAL STRUCTURES AND ENCAPSULATED-POLYMER SPHERES
A method of forming a bonding assembly that includes positioning a plurality of polymer spheres against an opal structure and placing a substrate against a second major surface of the opal structure. The opal structure includes the first major surface and the second major surface with a plurality of voids defined therebetween. The plurality of polymer spheres encapsulates a solder material disposed therein and contacts the first major surface of the opal structure. The method includes depositing a material within the voids of the opal structure and removing the opal structure to form an inverse opal structure between the first and second major surfaces. The method further includes removing the plurality of polymer spheres to expose the solder material encapsulated therein and placing a semiconductor device onto the inverse opal structure in contact with the solder material.
METHODS OF FORMING POWER ELECTRONIC ASSEMBLIES USING METAL INVERSE OPAL STRUCTURES AND ENCAPSULATED-POLYMER SPHERES
A method of forming a bonding assembly that includes positioning a plurality of polymer spheres against an opal structure and placing a substrate against a second major surface of the opal structure. The opal structure includes the first major surface and the second major surface with a plurality of voids defined therebetween. The plurality of polymer spheres encapsulates a solder material disposed therein and contacts the first major surface of the opal structure. The method includes depositing a material within the voids of the opal structure and removing the opal structure to form an inverse opal structure between the first and second major surfaces. The method further includes removing the plurality of polymer spheres to expose the solder material encapsulated therein and placing a semiconductor device onto the inverse opal structure in contact with the solder material.
HEATING OF A SUBSTRATE FOR EPOXY DEPOSITION
A semiconductor die is bonded using epoxy onto a substrate supported on a heating platform. After preheating the substrate with the heating platform to a temperature of between 25 C. and 60 C., an epoxy dispenser deposits an epoxy dot onto the substrate before the semiconductor die is placed onto the epoxy dot with a pick head to thereby bond the semiconductor die onto the substrate.
SEMICONDUCTOR DEVICE WITH A LAYERED PROTECTION MECHANISM AND ASSOCIATED SYSTEMS, DEVICES, AND METHODS
A semiconductor device includes a first die; a second die attached over the first die; a metal enclosure directly contacting and extending between the first die and the second die, wherein the first metal enclosure is continuous and encircles a set of one or more internal interconnects, wherein the first metal enclosure is configured to electrically connect to a first voltage level; and a second metal enclosure directly contacting and extending between the first die and the second die, wherein the second metal enclosure is continuous and encircles the first metal enclosure and is configured to electrically connect to a second voltage level; wherein the first metal enclosure and the second metal enclosure are configured to provide an enclosure capacitance encircling the set of one or more internal interconnects for shielding signals on the set of one or more internal interconnects.
SEMICONDUCTOR DEVICE WITH A LAYERED PROTECTION MECHANISM AND ASSOCIATED SYSTEMS, DEVICES, AND METHODS
A semiconductor device includes a first die; a second die attached over the first die; a metal enclosure directly contacting and extending between the first die and the second die, wherein the first metal enclosure is continuous and encircles a set of one or more internal interconnects, wherein the first metal enclosure is configured to electrically connect to a first voltage level; and a second metal enclosure directly contacting and extending between the first die and the second die, wherein the second metal enclosure is continuous and encircles the first metal enclosure and is configured to electrically connect to a second voltage level; wherein the first metal enclosure and the second metal enclosure are configured to provide an enclosure capacitance encircling the set of one or more internal interconnects for shielding signals on the set of one or more internal interconnects.
METHODS OF FORMING POWER ELECTRONIC ASSEMBLIES USING METAL INVERSE OPALS AND CAP STRUCTURES
Methods for forming bonded assemblies using metal inverse opal and cap structures are disclosed. In one embodiment, a method for forming a bonded assembly includes positioning a substrate against a polymer support that is porous, depositing a metal onto and within the polymer support, disposing a cap layer to the polymer support opposite of the substrate to form a bottom electrode, and removing the polymer support from between the substrate and the cap layer to form a metal inverse opal structure disposed therebetween.
METHODS OF FORMING POWER ELECTRONIC ASSEMBLIES USING METAL INVERSE OPALS AND CAP STRUCTURES
Methods for forming bonded assemblies using metal inverse opal and cap structures are disclosed. In one embodiment, a method for forming a bonded assembly includes positioning a substrate against a polymer support that is porous, depositing a metal onto and within the polymer support, disposing a cap layer to the polymer support opposite of the substrate to form a bottom electrode, and removing the polymer support from between the substrate and the cap layer to form a metal inverse opal structure disposed therebetween.
Placement method for circuit carrier and circuit carrier
The invention concerns a process for the production of a circuit carrier (1) equipped with at least one surface-mount LED (SMD-LED), wherein the at least one SMD-LED (2) is positioned in oriented relationship to one or more reference points (3) of the circuit carrier (1) on the circuit carrier (1), wherein the position of a light-emitting region (4) of the at least one SMD-LED (2) is optically detected in the SMD-LED (2) and the a least one SMD-LED (2) is mounted to the circuit carrier (1) in dependence on the detected position of the light-emitting region (4) of the at least one SMD-LED (2), and such a circuit carrier (1).