Patent classifications
H01L2924/05032
COMPOSITION FOR PROVISIONAL FIXATION AND METHOD FOR PRODUCING BONDED STRUCTURE
A temporary fixing composition is provided that is used to temporarily fix a first bonding target material and a second bonding target material to each other before the two bonding target materials are bonded to each other. The temporary fixing composition contains a first organic component having a viscosity of less than 70 mPa.Math.s at 25° C. and a boiling point of 200° C. or lower and a second organic component having a viscosity of 70 mPa.Math.s or greater at 25° C. and a boiling point of 210° C. or higher. It is preferable that, when thermogravimetry-differential thermal analysis is performed under the conditions at a temperature increase rate of 10° C./min in a nitrogen atmosphere with a sample mass of 30 mg, the 95% mass reduction temperature is lower than 300° C.
COMPOSITION FOR PROVISIONAL FIXATION AND METHOD FOR PRODUCING BONDED STRUCTURE
A temporary fixing composition is provided that is used to temporarily fix a first bonding target material and a second bonding target material to each other before the two bonding target materials are bonded to each other. The temporary fixing composition contains a first organic component having a viscosity of less than 70 mPa.Math.s at 25° C. and a boiling point of 200° C. or lower and a second organic component having a viscosity of 70 mPa.Math.s or greater at 25° C. and a boiling point of 210° C. or higher. It is preferable that, when thermogravimetry-differential thermal analysis is performed under the conditions at a temperature increase rate of 10° C./min in a nitrogen atmosphere with a sample mass of 30 mg, the 95% mass reduction temperature is lower than 300° C.
Light-emitting device
A light-emitting device includes: a light-emitting element including a first surface provided as a light extraction surface, a second surface opposite to the first surface, a plurality of third surfaces between the first surface and the second surface, and a positive electrode and a negative electrode at the second surface; a light-transmissive member disposed at the first surface; and a bonding member disposed between the light-emitting element and the light-transmissive member and covering from the first surface to the plurality of third surfaces of the light-emitting element to bond the light-emitting element and the light-transmissive member. The bonding member is made of a resin that contains nanoparticles. The nanoparticles have a particle diameter of 1 nm or more and 30 nm or less and a content of 10 mass % or more and 20 mass % or less.
Light-emitting device
A light-emitting device includes: a light-emitting element including a first surface provided as a light extraction surface, a second surface opposite to the first surface, a plurality of third surfaces between the first surface and the second surface, and a positive electrode and a negative electrode at the second surface; a light-transmissive member disposed at the first surface; and a bonding member disposed between the light-emitting element and the light-transmissive member and covering from the first surface to the plurality of third surfaces of the light-emitting element to bond the light-emitting element and the light-transmissive member. The bonding member is made of a resin that contains nanoparticles. The nanoparticles have a particle diameter of 1 nm or more and 30 nm or less and a content of 10 mass % or more and 20 mass % or less.
SEMICONDUCTOR DEVICE WITH ENHANCED THERMAL DISSIPATION AND METHOD FOR MAKING THE SAME
A method includes forming a solder layer on a surface of one or more chips. A lid is positioned over the solder layer on each of the one or more chips. Heat and pressure are applied to melt the solder layer and attach each lid to a corresponding solder layer. The solder layer has a thermal conductivity of ≥50 W/mK.
SEMICONDUCTOR DEVICE WITH ENHANCED THERMAL DISSIPATION AND METHOD FOR MAKING THE SAME
A method includes forming a solder layer on a surface of one or more chips. A lid is positioned over the solder layer on each of the one or more chips. Heat and pressure are applied to melt the solder layer and attach each lid to a corresponding solder layer. The solder layer has a thermal conductivity of ≥50 W/mK.
DICING DIE ATTACH FILM AND METHOD OF PRODUCING THE SAME, AND SEMICONDUCTOR PACKAGE AND METHOD OF PRODUCING THE SAME
A dicing die attach film including a dicing film and a die attach film laminated on the dicing film, in which the die attach film has an arithmetic average roughness Ra1 of from 0.05 to 2.50 μm at a surface in contact with the dicing film, and a value of ratio of Ra1 to an arithmetic average roughness Ra2 at a surface that is of the die attach film and is opposite to the surface in contact with the dicing film is from 1.05 to 28.00.
DICING DIE ATTACH FILM AND METHOD OF PRODUCING THE SAME, AND SEMICONDUCTOR PACKAGE AND METHOD OF PRODUCING THE SAME
A dicing die attach film including a dicing film and a die attach film laminated on the dicing film, in which the die attach film has an arithmetic average roughness Ra1 of from 0.05 to 2.50 μm at a surface in contact with the dicing film, and a value of ratio of Ra1 to an arithmetic average roughness Ra2 at a surface that is of the die attach film and is opposite to the surface in contact with the dicing film is from 1.05 to 28.00.
Redistribution layer metallic structure and method
The present disclosure provides an integrated circuit (IC) structure. The IC structure includes a semiconductor substrate; an interconnection structure formed on the semiconductor substrate; and a redistribution layer (RDL) metallic feature formed on the interconnection structure. The RDL metallic feature further includes a barrier layer disposed on the interconnection structure; a diffusion layer disposed on the barrier layer, wherein the diffusion layer includes metal and oxygen; and a metallic layer disposed on the diffusion layer.
Redistribution layer metallic structure and method
The present disclosure provides an integrated circuit (IC) structure. The IC structure includes a semiconductor substrate; an interconnection structure formed on the semiconductor substrate; and a redistribution layer (RDL) metallic feature formed on the interconnection structure. The RDL metallic feature further includes a barrier layer disposed on the interconnection structure; a diffusion layer disposed on the barrier layer, wherein the diffusion layer includes metal and oxygen; and a metallic layer disposed on the diffusion layer.