The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a base. The base has a device-attach surface. A radio-frequency (RF) device is embedded in the base. The RF device is close to the device-attach surface.

A microelectronic unit can include a carrier structure having a front surface, a rear surface remote from the front surface, and a recess having an opening at the front surface and an inner surface located below the front surface of the carrier structure. The microelectronic unit can also include a microelectronic element having a top surface adjacent the inner surface, a bottom surface remote from the top surface, and a plurality of contacts at the top surface. The microelectronic unit can also include terminals electrically connected with the contacts of the microelectronic element. The terminals can be electrically insulated from the carrier structure. The microelectronic unit can also include a dielectric region contacting at least the bottom surface of the microelectronic element. The dielectric region can define a planar surface located coplanar with or above the front surface of the carrier structure.

A microelectronic unit can include a carrier structure having a front surface, a rear surface remote from the front surface, and a recess having an opening at the front surface and an inner surface located below the front surface of the carrier structure. The microelectronic unit can also include a microelectronic element having a top surface adjacent the inner surface, a bottom surface remote from the top surface, and a plurality of contacts at the top surface. The microelectronic unit can also include terminals electrically connected with the contacts of the microelectronic element. The terminals can be electrically insulated from the carrier structure. The microelectronic unit can also include a dielectric region contacting at least the bottom surface of the microelectronic element. The dielectric region can define a planar surface located coplanar with or above the front surface of the carrier structure.

An implantable electrode array is provided that includes a carrier that is flexible. At least one control module is coupled to the carrier. A shell encases the control module. At least one electrode is coupled to the carrier and is electrically connected to the control module.

An implantable electrode array is provided that includes a carrier that is flexible. At least one control module is coupled to the carrier. A shell encases the control module. At least one electrode is coupled to the carrier and is electrically connected to the control module.

A semiconductor substrate includes a dielectric layer, a first conductive layer, a first barrier layer and a conductive post. The dielectric layer has a first surface and a second surface opposite to the first surface. The first conductive layer is disposed adjacent to the first surface of the dielectric layer. The first barrier layer is disposed on the first conductive layer. The conductive post is disposed on the first barrier layer. A width of the conductive post is equal to or less than a width of the first barrier layer.

A packaged semiconductor chip includes a semiconductor sub strate having formed thereon: radio-frequency (RF) input and output contact pads, DC contact pads, and first and second amplifier stages. An input of the first amplifier stage is coupled with the RF input contact pad. An input and an output of the second amplifier stage are respectively coupled to an output of the first amplifier stage and the RF output contact pad. The DC contact pads and the input of the first amplifier stages are connected via an input bias coupling path. The outputs of the amplifier stages are connected via an output bias coupling path. The chip further includes a lead frame having RF input and output pins electrically coupled to the RF input and output contact pads, and input bias pins electrically coupled to the DC contact pad.

A memory device includes a package substrate and at least one stack of a plurality of semiconductor dies disposed on the package substrate. The plurality of semiconductor dies can be stacked in a shingled configuration. Each semiconductor die includes a plurality of slits disposed in a first direction. An offset direction defining the shingled arrangement is in-line with the first direction. Each semiconductor die can include a die substrate and a plurality of memory planes disposed on the die substrate with each memory plane having a memory cell array. Each slit can divide and separate each memory plane into at least one of logic blocks or sub-logic blocks. The semiconductor die can include a plurality of bond pads linearly aligned in a second direction that is perpendicular to the first direction.

Provided are a flip connection structure, a room-temperature flip connection structure, and a connection method therefor, in which there is no risk of deterioration of a substrate or a semiconductor chip due to heat. Provided is a flip-chip connection structure in which semiconductors are connected using a flip chip structure of chip on chip. Each of terminals that connects the semiconductors is formed by aluminum (Al), and the terminals constitute a joined body integrally joined to each other by ultrasonic vibration involving pressurization.

A method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed.