Semiconductor packages and package assemblies having active dies and external die mounts on a silicon wafer, and methods of fabricating such semiconductor packages and package assemblies, are described. In an example, a semiconductor package assembly includes a semiconductor package having an active die attached to a silicon wafer by a first solder bump. A second solder bump is on the silicon wafer laterally outward from the active die to provide a mount for an external die. An epoxy layer may surround the active die and cover the silicon wafer. A hole may extend through the epoxy layer above the second solder bump to expose the second solder bump through the hole. Accordingly, an external memory die can be connected directly to the second solder bump on the silicon wafer through the hole.

An electronic device module includes: a substrate; a sealing portion disposed on the substrate; at least one electronic device mounted on the substrate and embedded in the sealing portion; and a roof wiring at least partially disposed on a surface of the sealing portion and electrically connecting the substrate to the at least one electronic device or electrically connecting electronic devices, among the at least one electronic device, to each other. The roof wiring includes: a surface wiring disposed on one surface of the sealing portion; and at least one post wiring connecting the surface wiring to the substrate or to the at least one electronic device, and wherein at least a portion of a circumferential surface of the at least one post wiring is bonded to the surface wiring.

Disclosed is an EMI shielding material. The EMI shielding material comprises a resin material and metal particles mixed with each other, wherein the surface of the metal particles has an insulating protective layer. Further disclosed is a communication module product, comprising a module element arranged on a substrate, wherein the periphery of the module element that requires EMI shielding is filled with said shielding material. Further disclosed is an EMI shielding process, comprising the following steps: a. preparing a communication module on which a module element is provided; and b. applying said shielding material to a region of the module element that needs to be EMI shielded on the communication module. The shielding material can shield a chip region in a wrapping manner, that is, the shielding material can wrap and shield all six surfaces or six directions of the chip, and can provide shielding between chips. The shielding material, when combined with an existing shielding process, can achieve good shielding from low frequencies to high frequencies, and has very low process costs.

A semiconductor package includes a semiconductor die including terminals, a plurality of leads, at least some of the leads being electrically coupled to the terminals within the semiconductor package, a sensor on a surface of the semiconductor die, laser shielding forming a perimeter around the sensor on the surface of the semiconductor die, and a mold compound surrounding the semiconductor die except for an area inside the perimeter on the surface of the semiconductor die such that the sensor is exposed to an external environment.

An apparatus includes a product substrate having a transfer surface, and a semiconductor die defined, at least in part, by a first surface adjoined to a second surface that extends in a direction transverse to the first surface. The transfer surface includes ripples in a profile thereof such that an apex on an individual ripple is a point on a first plane and a trough on the individual ripple is a point on a second plane. The semiconductor die is disposed on the transfer surface between the first plane and the second plane such that the second surface of the semiconductor die extends transverse to the first plane and the second plane.

According to one embodiment, a semiconductor device includes a substrate, first stacked components, second stacked components, and a coating resin. The first stacked components include first chips and are stacked on a surface of the substrate. The second stacked components include second chips and are stacked on the surface. The coating resin covers the surface, the first stacked components, and the second stacked components. A first top surface of a second farthest one of the first chips away from the surface differs in position in a first direction from a second top surface of second farthest one of the second chips away from the surface.

Disclosed is a packaging structure for circuit units, comprising: a circuit baseplate, wherein the circuit baseplate is provided thereon with a circuit unit, the circuit unit including a silicon dioxide layer and an electronic device arranged on the silicon dioxide layer; an insulator, wherein the insulator surrounds the circuit unit; and an electromagnetic shielding layer, wherein the electromagnetic shielding layer covers the circuit unit and the insulator.

A semiconductor package element includes a die, a passive layer, a conductive structure and an encapsulation layer. The die includes a first surface, a second surface and a third surface. The second surface is opposite to the first surface. The third surface is connected between the first surface and the second surface. The passive layer is disposed on the first surface and formed with a hole. The conductive structure is electrically coupled to the die through the hole. The encapsulation layer covers the first surface and the third surface of the die, wherein the passive layer is embedded in the encapsulation layer, a portion of the conductive structure is embedded in the encapsulation layer, and the other portion of the conductive structure protrudes from an etched surface of the encapsulation layer, the etched surface is formed by plasma etching.

A semiconductor package is provided. The semiconductor package includes a first structure with a first insulating layer and a connection pad which penetrates through the first insulating layer; and a second structure with a second insulating layer bonded to the first insulating layer and a pad structure provided in a recess portion of the second insulating layer. The pad structure is bonded to and wider than the connection pad. The pad structure includes: an electrode pad disposed on a bottom surface of the recess portion; a solder disposed on the electrode pad and bonded to the connection pad; and a conductive support disposed to surround a side surface of the solder on the electrode pad and bonded to the first insulating layer. A melting point of the conductive support is higher than a melting point of the solder.

Provided is a semiconductor device including: a lead frame having an upper surface provided with a concave portion and a lower surface provided with a convex portion; a semiconductor chip fixed to the upper surface of the lead frame; a solder layer provided in the concave portion and fixing the semiconductor chip to the upper surface of the lead frame; and a sealing resin for sealing the semiconductor chip and the lead frame. A thickness of the solder layer is larger than a depth of the concave portion. The sealing resin covers at least a part of the lower surface of the lead frame. At least a part of the convex portion of the lead frame is exposed from the sealing resin.