A package comprising a first integrated device, a first metallization portion coupled to the first integrated device, a second integrated device, a second metallization portion coupled to the second integrated device and the first metallization portion, and an encapsulation layer coupled to the first metallization portion, the second integrated device and the second metallization portion. The first metallization portion includes at least one first dielectric layer and a first plurality of metallization interconnects. The second metallization portion includes at least one second dielectric layer and a second plurality of metallization interconnects.

Embodiments include semiconductor packages and a method to form such semiconductor packages. A semiconductor package includes a plurality of dies on a substrate, and an encapsulation layer over the substrate. The encapsulation layer surrounds the dies. The semiconductor package also includes a plurality of dummy silicon regions on the substrate. The dummy silicon regions surround the dies and encapsulation layer. The plurality of dummy silicon regions are positioned on two or more edges of the substrate. The dummy silicon regions have a top surface substantially coplanar to a top surface of the dies. The dummy silicon regions include materials that include silicon, metals, or highly-thermal conductive materials. The materials have a thermal conductivity of approximately 120 W/mK or greater, or is equal to or greater than the thermal conductivity of silicon. An underfill layer surrounds the substrate and the dies, where the encapsulation layer surrounds portions of the underfill layer.

According to various aspects and embodiments, a support structure for packaging an electronic device is provided. In one example, a packaged electronic device includes a substrate, at least one electronic device disposed on the substrate, an encapsulation structure disposed on the substrate and having a wall that forms a perimeter around the at least one electronic device, and at least one support structure formed from a photosensitive polymer and disposed adjacent the wall of the encapsulation structure. The at least one support structure has a configuration that provides at least one of increased adhesion and mechanical strength to the encapsulation structure.

The present disclosure is directed to at least one semiconductor package including a die within an encapsulant having a first sidewall, an adhesive layer on the encapsulant and having a second sidewall coplanar with the first sidewall of the encapsulant, and an insulating layer on the adhesive layer having a third sidewall coplanar with the first sidewall and the second sidewall. A method of manufacturing the at least one semiconductor package includes forming an insulating layer on a temporary adhesion layer of a carrier, forming an adhesive layer on the insulating layer, and forming a plurality of openings through the adhesive layer and the insulating layer. The plurality of openings through the adhesive layer and the insulating layer may be formed by exposing the adhesive layer and the insulating layer to a laser.

Disclosed is a method of manufacturing a semiconductor device that includes a semiconductor die surrounded by a support frame for strengthening the semiconductor device compared to prior devices. A framing member is adhered to a carrier substrate along with dies that are positioned within through-holes in the framing member. The framing member and dies are encapsulated within a molding compound. The carrier substrate is then removed, and an RDL is formed on the dies. The resulting structure is then diced along portions of the framing structure into individual semiconductor devices, leaving portions of the framing structure in place and surrounding the dies as support frames.

A module includes an assembly of a semiconductor device die, a lead frame connected to the semiconductor device die, and a substrate connected to the lead frame. The substrate includes at least one plated-through hole (PTH). A mold body encapsulates the assembly. The mold body includes a through-mold via (TMV) aligned with a portion of the substrate including the at least one PTH. The PTH is exposed in the TMV to an environment outside the mold body and is physically accessible from outside the mold body through the TMV.

According to one embodiment, a semiconductor device includes a wiring substrate and a first semiconductor chip. The first semiconductor chip has a first surface facing the wiring substrate. The first surface has a groove. The groove extends across the first surface and divides the first surface into a first portion and a second portion. A first bonding layer is between the first portion of the first surface and the wiring substrate. A second bonding layer is between the second portion of the first surface and the wiring substrate. A second semiconductor chip is on the wiring substrate. The second semiconductor chip has a portion inside the groove of the first semiconductor chip. A third bonding layer is between the bottom of the groove and a second surface of the second semiconductor chip.

An electronic package is provided, in which an electronic element is disposed on a carrier with a circuit layer, and an encapsulation layer encapsulating the electronic element has an opening exposing the circuit layer, where a metal structure can be contact-bonded on a wall surface of the opening, and a conductive element is formed on the metal structure and electrically connected to the circuit layer. Therefore, no gap is formed between the conductive element and the wall surface of the opening, such that the DC resistance of the conductive element can be reduced.

According to one embodiment, a method of manufacturing a semiconductor device includes etching a sealing resin so that a filler inside the resin is exposed at an outer surface of the resin. The manufacturing method further includes determining the exposed amount of the filler after etching by measuring the optical properties of the surface of the resin. Additional etching may then be performed, if necessary, such that the appropriate amount of filler is exposed from the resin. In subsequent steps, a conductive film may be deposited on the surface of the resin. For example, the conductive film may be used as shield layer of the semiconductor device.

A semiconductor device includes an assembly configured such that a plurality of semiconductor modules is connected by a component. Each of the plurality of semiconductor modules includes a semiconductor element including a front-surface electrode fixing a front-surface electrode plate and a back-surface electrode fixing a back-surface electrode plate, wherein the component is either of a first component and a second component. The first component being configured to connect adjacent semiconductor modules to each other such that a front-surface electrode plate of one of the adjacent semiconductor modules is connected to a back-surface electrode plate of the other one of the adjacent semiconductor modules. The second component is configured to connect adjacent semiconductor modules such that respective front-surface electrode plates are connected and respective back-surface electrode plates are connected. The semiconductor modules are connected by the first component or the second component.